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LP62S4096EX-55LLT

Description
512K X 8 BIT LOW VOLTAGE CMOS SRAM
Categorystorage    storage   
File Size164KB,14 Pages
ManufacturerAMICC [AMIC TECHNOLOGY]
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LP62S4096EX-55LLT Overview

512K X 8 BIT LOW VOLTAGE CMOS SRAM

LP62S4096EX-55LLT Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerAMICC [AMIC TECHNOLOGY]
package instructionTSOP1, TSSOP32,.56,20
Reach Compliance Codeunknow
Maximum access time55 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-G32
JESD-609 codee0
length11.8 mm
memory density4194304 bi
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals32
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-25 °C
organize512KX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Encapsulate equivalent codeTSSOP32,.56,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
power supply3/3.3 V
Certification statusNot Qualified
Maximum seat height1.25 mm
Maximum standby current0.000003 A
Minimum standby current2 V
Maximum slew rate0.03 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
width8 mm

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Description 512K X 8 BIT LOW VOLTAGE CMOS SRAM 512K X 8 BIT LOW VOLTAGE CMOS SRAM 512K X 8 BIT LOW VOLTAGE CMOS SRAM 512K X 8 BIT LOW VOLTAGE CMOS SRAM 512K X 8 BIT LOW VOLTAGE CMOS SRAM 512K X 8 BIT LOW VOLTAGE CMOS SRAM 512K X 8 BIT LOW VOLTAGE CMOS SRAM

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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