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LT1457CN8

Description
Dual, Precision JFET Input Op Amp
CategoryAnalog mixed-signal IC    Amplifier circuit   
File Size201KB,8 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Download Datasheet Parametric Compare View All

LT1457CN8 Overview

Dual, Precision JFET Input Op Amp

LT1457CN8 Parametric

Parameter NameAttribute value
Brand NameLinear Technology
Is it Rohs certified?incompatible
MakerLinear ( ADI )
Parts packaging codeDIP
package instructionDIP, DIP8,.3
Contacts8
Manufacturer packaging codeN
Reach Compliance Code_compli
ECCN codeEAR99
Is SamacsysN
Amplifier typeOPERATIONAL AMPLIFIER
ArchitectureVOLTAGE-FEEDBACK
Maximum average bias current (IIB)0.000075 µA
Maximum bias current (IIB) at 25C0.000075 µA
Nominal Common Mode Rejection Ratio95 dB
frequency compensationYES
Maximum input offset current (IIO)0.0006 µA
Maximum input offset voltage800 µV
JESD-30 codeR-PDIP-T8
JESD-609 codee0
low-biasYES
low-dissonanceNO
Humidity sensitivity level1
Negative supply voltage upper limit-20 V
Nominal Negative Supply Voltage (Vsup)-15 V
Number of functions2
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP8,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply+-15 V
Certification statusNot Qualified
Maximum seat height3.937 mm
minimum slew rate2 V/us
Nominal slew rate2 V/us
Maximum slew rate7.6 mA
Supply voltage upper limit20 V
Nominal supply voltage (Vsup)15 V
surface mountNO
technologyBIPOLAR
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Nominal Uniform Gain Bandwidth1700 kHz
Minimum voltage gain30000
width7.62 mm
Base Number Matches1
LT1457
Dual, Precision
JFET Input Op Amp
FEATURES
s
s
s
s
s
s
s
s
DESCRIPTION
The LT1457 is a dual, JFET input op amp optimized for
handling large capacitive loads in combination with preci-
sion performance.
Precision specifications include 220µV offset voltage in
plastic and surface mount packages. At 70°C input bias
current is 50pA, input offset current is 20pA. Channel
separation is 130dB.
Other dual JFET input op amps from Linear Technology
include the LT1057, which is three times faster than the
LT1457 but at the expense of significantly lower capacitive
load handling capability; and the LT1113 with 4.5nV/√Hz
voltage noise.
Handles 10,000pF Capacitive Load
450µV Max Offset Voltage
1200µV Max Offset Voltage in S8 Package
50pA Bias Current at 70°C
13nV/√Hz Voltage Noise
4V/µs Slew Rate
4µV/°C Drift
130dB Channel Separation
APPLICATIONS
s
s
s
s
Sample-and-Hold (Drives Large Hold Capacitors)
A/D and D/A Converters
Photodiode Amplifiers
Voltage-to-Frequency Converters
TYPICAL PERFORMANCE CHARACTERISTICS
Capacitive Load Handling
100
V
S
= ±15V
T
A
= 25°C
A
V
= +1
PERCENT OF UNITS
21
18
15
12
9
6
3
0
0.1
0
–1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0
INPUT OFFSET VOLTAGE (mV)
LT1457 • TA02
Input Offset Voltage Distribution
S8 Package
V
S
=
±15V
T
A
= 25°C
400 DUALS
(800 OP AMPS)
TESTED FROM
3 RUNS
80
OVERSHOOT (%)
60
40
20
1
10
CAPACITIVE LOAD (nF)
100
LT11457• TA01
U
U W
U
1

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