EPF10K30QM240-4 datasheet, PDF

EPF10K30QM240-4: DescriptionLoadable PLD, 23.8ns, CMOS, PQFP240, QFP-240; CategoryProgrammable logic devices Programmable logic; File Size1MB，55 Pages; ManufacturerAltera (Intel)

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EPF10K30QM240-4 Overview

Loadable PLD, 23.8ns, CMOS, PQFP240, QFP-240

Parameter Name	Attribute value
Maker	Altera (Intel)
Parts packaging code	QFP
package instruction	FQFP,
Contacts	240
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Other features	1728 LOGIC ELEMENTS; BUILT-IN JTAG BOUNDARY-SCAN TEST CIRCUITRY
maximum clock frequency	60.6 MHz
JESD-30 code	S-PQFP-G240
JESD-609 code	e3
length	32 mm
Dedicated input times	4
Number of terminals	240
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	4 DEDICATED INPUTS
Output function	REGISTERED
Package body material	PLASTIC/EPOXY
encapsulated code	FQFP
Package shape	SQUARE
Package form	FLATPACK, FINE PITCH
Programmable logic type	LOADABLE PLD
propagation delay	23.8 ns
Certification status	Not Qualified
Maximum seat height	4.1 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	32 mm
Base Number Matches	1

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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