EQRA12K1H-47.030M TR datasheet, PDF

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EQRA12K1H-47.030M TR: DescriptionCMOS, Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 2.5Vdc 6 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD) Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 2.5Vdc 6 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD); CategoryPassive components oscillator; File Size957KB，7 Pages; ManufacturerECLIPTEK; Websitehttp://www.ecliptek.com; Environmental Compliance

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EQRA12K1H-47.030M TR Overview

CMOS, Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 2.5Vdc 6 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD) Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 2.5Vdc 6 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD)

EQRA12K1H-47.030M TR Parametric

Parameter Name	Attribute value
Brand Name	Ecliptek
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	SMD 5.0mm x 7.0mm
Contacts	6
Manufacturer packaging code	SMD 5.0mm x 7.0mm
Reach Compliance Code	163
Base Number Matches	1

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EQRA12K1H-47.030M

REGULATORY COMPLIANCE

2011/65 +

2015/863

(Data Sheet downloaded on Sep 21, 2020)

191 SVHC

ITEM DESCRIPTION

Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 2.5Vdc 6 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD)

47.030MHz ±50ppm over -40°C to +85°C

ELECTRICAL SPECIFICATIONS

Nominal Frequency

Frequency Tolerance/Stability

Aging at 25°C

Supply Voltage

Input Current

Output Voltage Logic High (Voh)

Output Voltage Logic Low (Vol)

Rise/Fall Time

Duty Cycle

Load Drive Capability

Output Logic Type

Phase Noise

47.030MHz

±50ppm Maximum over -40°C to +85°C (Inclusive of all conditions: Calibration Tolerance (at 25°C), Frequency Stability

over the Operating Temperature Range, Supply Voltage Change and Output Load Change)

±2ppm Maximum First Year, ±10ppm/10 Years Maximum

2.5Vdc ±5%

20mA Maximum (Unloaded)

90% of Vdd Minimum (IOH = -4mA)

10% of Vdd Maximum (IOL = +4mA)

3nSec Maximum (Measured at 10% to 90% of Waveform)

50 ±10(%) (Measured at 50% of Waveform)

15pF Maximum

CMOS

-64dBc/Hz at 10Hz offset; -96dBc/Hz at 100Hz offset; -124dBc/Hz at 1kHz offset; -131dBc/Hz at 10kHz offset; -

132dBc/Hz at 100kHz offset; -149dBc/Hz at 1MHz offset; -157dBc/Hz at 10MHz offset; -159dBc/Hz at 20MHz offset (All

Values are Typical)

Output Enable (OE)

90% of Vdd Minimum or No Connect to Enable Output

10% of Vdd Maximum to Disable Output (High Impedance)

100nSec Maximum

50nSec Maximum

15mA Maximum (Without Load (Pin 1 = Ground))

1.5pSec Maximum (Fj=12kHz to 20MHz (Random))

0.2pSec Typical

2pSec Typical

3pSec Maximum

30pSec Maximum

10mSec Maximum

-55°C to +125°C

Output Control Function

Output Control Input Voltage Logic

High (Vih)

Output Control Input Voltage Logic

Low (Vil)

Output Enable Time

Output Disable Time

Output Enable Current

RMS Phase Jitter

Period Jitter (Deterministic)

Period Jitter (Random)

Period Jitter (RMS)

Period Jitter (pk-pk)

Start Up Time

Storage Temperature Range

ENVIRONMENTAL & MECHANICAL SPECIFICATIONS

ESD Susceptibility

Fine Leak Test

Flammability

Gross Leak Test

Mechanical Shock

Moisture Resistance

Moisture Sensitivity

Resistance to Soldering Heat

MIL-STD-883, Method 3015, Class 1, HBM: 1500V

MIL-STD-883, Method 1014, Condition A

UL94-V0

MIL-STD-883, Method 1014, Condition C

MIL-STD-883, Method 2002, Condition B

MIL-STD-883, Method 1004

J-STD-020, MSL 1

MIL-STD-202, Method 210, Condition K

www.ecliptek.com | Specification Subject to Change Without Notice | Revision C 01/18/2019 | Page 1 of 7

Ecliptek, LLC

5458 Louie Lane, Reno, NV 89511

1-800-ECLIPTEK or 714.433.1200

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