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ATH3000L-20JC

Description
OT PLD, 20ns, PAL-Type, CMOS, PQCC68, PLASTIC, MO-047AE, JLCC-68
CategoryProgrammable logic devices    Programmable logic   
File Size395KB,12 Pages
ManufacturerAtmel (Microchip)
Download Datasheet Parametric View All

ATH3000L-20JC Overview

OT PLD, 20ns, PAL-Type, CMOS, PQCC68, PLASTIC, MO-047AE, JLCC-68

ATH3000L-20JC Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeLCC
package instructionQCCJ, LDCC68,1.0SQ
Contacts68
Reach Compliance Codecompliant
Other featuresPAL WITH MACROCELLS; 56 MACROCELLS; 2 EXTERNAL CLOCKS
ArchitecturePAL-TYPE
maximum clock frequency31.3 MHz
JESD-30 codeS-PQCC-J68
JESD-609 codee0
length24.2316 mm
Humidity sensitivity level3
Dedicated input times2
Number of I/O lines56
Number of entries56
Output times56
Number of terminals68
Maximum operating temperature70 °C
Minimum operating temperature
organize2 DEDICATED INPUTS, 56 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC68,1.0SQ
Package shapeSQUARE
Package formCHIP CARRIER
power supply5 V
Programmable logic typeOT PLD
propagation delay20 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
width24.2316 mm
Base Number Matches1

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