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EPM7256AEFC256-7N

Description
EE PLD, 7.5ns, 256-Cell, CMOS, PBGA256, FINE LINE, BGA-256
CategoryProgrammable logic devices    Programmable logic   
File Size1MB,66 Pages
ManufacturerIntel
Websitehttp://www.intel.com/
Environmental Compliance
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EPM7256AEFC256-7N Overview

EE PLD, 7.5ns, 256-Cell, CMOS, PBGA256, FINE LINE, BGA-256

EPM7256AEFC256-7N Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerIntel
package instructionBGA, BGA256,16X16,40
Reach Compliance Codecompliant
ECCN code3A991
Other featuresYES
maximum clock frequency126.6 MHz
In-system programmableYES
JESD-30 codeS-PBGA-B256
JESD-609 codee1
JTAG BSTYES
length17 mm
Humidity sensitivity level3
Dedicated input times
Number of I/O lines164
Number of macro cells256
Number of terminals256
Maximum operating temperature70 °C
Minimum operating temperature
organize0 DEDICATED INPUTS, 164 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeBGA
Encapsulate equivalent codeBGA256,16X16,40
Package shapeSQUARE
Package formGRID ARRAY
Peak Reflow Temperature (Celsius)260
power supply2.5/3.3,3.3 V
Programmable logic typeEE PLD
propagation delay7.5 ns
Certification statusNot Qualified
Maximum seat height2.1 mm
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN SILVER COPPER
Terminal formBALL
Terminal pitch1 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperature40
width17 mm
Base Number Matches1

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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