OT PLD, 55ns, 128-Cell, CMOS, PQFP100, PLASTIC, QFP-100
Parameter Name | Attribute value |
Is it Rohs certified? | incompatible |
Maker | Altera (Intel) |
Parts packaging code | QFP |
package instruction | QFP, QFP100,.7X.9 |
Contacts | 100 |
Reach Compliance Code | unknown |
Other features | 128 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS |
maximum clock frequency | 33.3 MHz |
In-system programmable | NO |
JESD-30 code | R-PQFP-G100 |
JESD-609 code | e0 |
JTAG BST | NO |
length | 20 mm |
Humidity sensitivity level | 3 |
Dedicated input times | 19 |
Number of I/O lines | 64 |
Number of macro cells | 128 |
Number of terminals | 100 |
Maximum operating temperature | 70 °C |
Minimum operating temperature | |
organize | 19 DEDICATED INPUTS, 64 I/O |
Output function | MACROCELL |
Package body material | PLASTIC/EPOXY |
encapsulated code | QFP |
Encapsulate equivalent code | QFP100,.7X.9 |
Package shape | RECTANGULAR |
Package form | FLATPACK |
power supply | 5 V |
Programmable logic type | OT PLD |
propagation delay | 55 ns |
Certification status | Not Qualified |
Maximum seat height | 3.65 mm |
Maximum supply voltage | 5.25 V |
Minimum supply voltage | 4.75 V |
Nominal supply voltage | 5 V |
surface mount | YES |
technology | CMOS |
Temperature level | COMMERCIAL |
Terminal surface | Tin/Lead (Sn/Pb) |
Terminal form | GULL WING |
Terminal pitch | 0.65 mm |
Terminal location | QUAD |
width | 14 mm |
Base Number Matches | 1 |