FT6116-20LM datasheet, PDF - EEWORLD Datasheet

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FT6116-20LM: DescriptionStandard SRAM, 2KX8, 20ns, CMOS, PQCC24, 0.300 X 0.400 INCH, LCC-24; Categorystorage storage; File Size556KB，15 Pages; ManufacturerForce Technologies Ltd.

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FT6116-20LM Overview

Standard SRAM, 2KX8, 20ns, CMOS, PQCC24, 0.300 X 0.400 INCH, LCC-24

FT6116-20LM Parametric

Parameter Name	Attribute value
Maker	Force Technologies Ltd.
Parts packaging code	LCC
package instruction	QCCN,
Contacts	24
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Maximum access time	20 ns
JESD-30 code	R-PQCC-N24
length	10.16 mm
memory density	16384 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	24
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	2KX8
Package body material	PLASTIC/EPOXY
encapsulated code	QCCN
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	1.9304 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD
width	7.62 mm
Base Number Matches	1

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FT6116/FT6116L

ULTRA HIGH SPEED 2K x 8

STATIC CMOS RAMS

FEATURES

Full CMOS, 6T Cell

High Speed (Equal Access and Cycle Times)

– 10/12/15/20/25/35 ns (Commercial)

– 15/20/25/35 ns (Military)

Low Power Operation

Output Enable Control Function

Single 5V±10% Power Supply

Common Data I/O

Fully TTL Compatible Inputs and Outputs

Produced with

CMOS

Technology

Standard Pinout (JEDEC Approved)

– 24-Pin 300 mil DIP, SOIC, SOJ

– 24-Pin Solder Seal Flat Pack

– 24-Pin Rectangular LCC (300 x 400 mils)

– 28-Pin Square LCC (450 x 450 mils)

– 32-Pin Rectangular LCC (450 x 550 mils)

– 40-Pin Square LCC (480 x 480 mils)

DESCRIPTION

The

FT6116/FT6116L

are 16,384-bit ultra high-speed

static RAMs organised as 2K x 8. The CMOS memories

require no clocks or refreshing and have equal access

and cycle times. Inputs are fully TTL-compatible. The

RAMs operate from a single 5V±10% tolerance power

supply. Current drain is typically 10 µA from a 2.0V

supply.

Access times as fast as 10 nanoseconds are available,

permitting greatly enhanced system operating speeds.

CMOS is used to reduce power consumption.

The

FT6116

is available in 24-pin 300 mil DIP, SOJ and

SOIC packages, a solder seal flatpack and 4 different

LCC packages (24, 28, 32, and 40 pin).

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATIONS

DIP (P4, C4), SOJ (J4), SOIC (S4)

SOLDER SEAL FLAT PACK (FS-1) SIMILAR

LCC configurations at end of datasheet

REV 1

1/15

2008

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