M27C405
4 Mbit (512Kb x 8) OTP EPROM
5V
±
10% SUPPLY VOLTAGE in READ
OPERATION
PIN COMPATIBLE with the 4 Mbit,
SINGLE VOLTAGE FLASH MEMORY
FAST ACCESS TIME: 70ns
LOW POWER CONSUMPTION:
– Active Current 30mA at 5MHz
– Standby Current 100µA
PROGRAMMING VOLTAGE: 12.75V
±
0.25V
PROGRAMMING TIMES
– Typical 48sec. (PRESTO II Algorithm)
– Typical 27sec. (On-Board Programming)
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: B4
32
1
PDIP32 (B)
PLCC32 (K)
TSOP32 (N)
8 x 20mm
DESCRIPTION
The M27C405 is a 4 Mbit EPROM offered in the
OTP (one time programmable) range. It is ideally
suited for microprocessor systems requiring large
programs, in the application where the contents is
stable and needs to be programmed only one time
and is organised as 524,288 by 8 bits.
The M27C405 is pin compatible with the industry
standard 4 Mbit, single voltage Flash memory. It
can be consideredas a Flash Low Cost solution for
production quantities.
The M27C405 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20 mm) packages.
Figure 1. Logic Diagram
VCC
VPP
19
A0-A18
8
Q0-Q7
E
M27C405
Table 1. Signal Names
A0-A18
Q0-Q7
E
G
V
PP
V
CC
V
SS
March 1999
Address Inputs
Data Outputs
Chip Enable
Output Enable
Program Supply
Supply Voltage
Ground
G
VSS
AI01601
1/15
M27C405
Figure 2A. DIP Pin Connections
Figure 2B. LCC Pin Connections
A18
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
VSS
1
32
2
31
3
30
4
29
5
28
6
27
7
26
8
25
M27C405
9
24
10
23
11
22
12
21
13
20
14
19
15
18
16
17
AI01602
VCC
VPP
A17
A14
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5
Q4
Q3
A7
A6
A5
A4
A3
A2
A1
A0
Q0
A12
A15
A16
A18
VCC
VPP
A17
1 32
A14
A13
A8
A9
A11
G
A10
E
Q7
9
M27C405
25
17
Q1
Q2
VSS
Q3
Q4
Q5
Q6
AI01603
Figure 2C. TSOP Pin Connections
A11
A9
A8
A13
A14
A17
VPP
VCC
A18
A16
A15
A12
A7
A6
A5
A4
1
32
8
9
M27C405
(Normal)
25
24
16
17
AI01604
G
A10
E
Q7
Q6
Q5
Q4
Q3
VSS
Q2
Q1
Q0
A0
A1
A2
A3
DEVICE OPERATION
The modesof operationsof theM27C405 are listed
in the Operating Modes table. A single power sup-
ply is required in the read mode. All inputs are TTL
levels except for V
pp
and 12V on A9 for Electronic
Signature.
Read Mode
The M27C405 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, the address access time
(t
AVQV
) is equalto the delay from E to output (t
ELQV
).
Data is availableat the output after a delay of t
GLQV
from the falling edge of G, assuming that E has
been low and the addresses have been stable for
at least t
AVQV
-t
GLQV
.
Standby Mode
The M27C405 has a standby mode which reduces
the active current from 30mA to 100µA. The
M27C405 is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standbymode, the outputs are in a high impedance
state, independent of the G input.
2/15
M27C405
Table 2. Absolute Maximum Ratings
(1)
Symbol
T
A
T
BIAS
T
STG
V
IO (2)
V
CC
V
A9 (2)
V
PP
Parameter
Ambient Operating Temperature
Temperature Under Bias
Storage Temperature
Input or Output Voltages (except A9)
Supply Voltage
A9 Voltage
Program Supply Voltage
(3)
Value
–40 to 125
–50 to 125
–65 to 150
–2 to 7
–2 to 7
–2 to 13.5
–2 to 14
Unit
°C
°C
°
C
V
V
V
V
Notes:
1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings”
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other
relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
CC
+0.5V with possible overshoot to V
CC
+2V for a period less than 20ns.
3. Depends on range.
Table 3. Operating Modes
Mode
Read
Output Disable
Program
Verify
Program Inhibit
Standby
Electronic Signature
Note:
X = V
IH
or V
IL
, V
ID
= 12V
±
0.5V
E
V
IL
V
IL
V
IL
Pulse
V
IH
V
IH
V
IH
V
IL
G
V
IL
V
IH
V
IH
V
IL
V
IH
X
V
IL
A9
X
X
X
X
X
X
V
ID
V
PP
V
CC
or V
SS
V
CC
or V
SS
V
PP
V
PP
V
PP
V
CC
or V
SS
V
CC
Q0 - Q7
Data Out
Hi-Z
Data In
Data Out
Hi-Z
Hi-Z
Codes
Table 4. Electronic Signature
Identifier
Manufacturer’s Code
Device Code
A0
V
IL
V
IH
Q7
0
1
Q6
0
0
Q5
1
1
Q4
0
1
Q3
0
0
Q2
0
1
Q1
0
0
Q0
0
0
Hex Data
20h
B4h
Two Line Output Control
Because OTP EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficientuse of thesetwo control lines,
E should be decoded and used as the primary
device selecting function, while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
control bus. This ensures that all deselected mem-
ory devices are in their low power standby mode
and that the output pins are only active when data
is required from a particular memory device.
3/15
M27C405
Table 5. AC Measurement Conditions
High Speed
Input Rise and Fall Times
Input Pulse Voltages
Input and Output Timing Ref. Voltages
≤
10ns
0 to 3V
1.5V
Standard
≤
20ns
0.4V to 2.4V
0.8V and 2V
Figure 3. AC Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
1.3V
High Speed
3V
1.5V
0V
DEVICE
UNDER
TEST
2.0V
0.8V
AI01822
1N914
3.3kΩ
Standard
2.4V
OUT
CL
0.4V
CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance
AI01823B
Table 6. Capacitance
(1)
(T
A
= 25
°C,
f = 1 MHz )
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Test Condition
V
IN
= 0V
V
OUT
= 0V
Min
Max
6
12
Unit
pF
pF
Note:
1. Sampled only, not 100% tested.
4/15
M27C405
Table 7. Read Mode DC Characteristics
(1)
(T
A
= 0 to 70
°C
or –40 to 85
°C;
V
CC
= 5V
±
10%; V
PP
= V
CC
)
Symbol
I
LI
I
LO
I
CC
I
CC1
I
CC2
I
PP
V
IL
V
IH
(2)
Parameter
Input Leakage Current
Output Leakage Current
Supply Current
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
Output High Voltage CMOS
Test Condition
0V
≤
V
IN
≤
V
CC
0V
≤
V
OUT
≤
V
CC
E = V
IL
, G = V
IL
,
I
OUT
= 0mA, f = 5MHz
E = V
IH
E > V
CC
– 0.2V
V
PP
= V
CC
Min
Max
±10
±
10
30
1
100
10
Unit
µA
µ
A
mA
mA
µA
µ
A
V
V
V
V
V
–0.3
2
I
OL
= 2.1mA
I
OH
= –400
µ
A
I
OH
= –100
µ
A
2.4
V
CC
– 0.7V
0.8
V
CC
+ 1
0.4
V
OL
V
OH
Notes:
1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP.
2. Maximum DC voltage on Output is V
CC
+0.5V.
Table 8A. Read Mode AC Characteristics
(1)
(T
A
= 0 to 70
°C
or –40 to 85
°C;
V
CC
= 5V
±
10%; V
PP
= V
CC
)
M27C405
Symbol
Alt
Parameter
Test Condition
-70
Min
t
AVQV
t
ELQV
t
GLQV
t
EHQZ (2)
t
GHQZ (2)
t
AXQX
t
ACC
t
CE
t
OE
t
DF
t
DF
t
OH
Address Valid to
Output Valid
Chip Enable Low to
Output Valid
Output Enable Low
to Output Valid
Chip Enable High to
Output Hi-Z
Output Enable High
to Output Hi-Z
Address Transition to
Output Transition
E = V
IL
, G = V
IL
G = V
IL
E = V
IL
G = V
IL
E = V
IL
E = V
IL
, G = V
IL
0
0
0
(3)
-80
Min
Max
80
80
40
0
0
0
30
30
0
0
0
Min
-90
Max
90
90
40
30
30
Unit
Max
70
70
35
30
30
ns
ns
ns
ns
ns
ns
Notes:
1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP.
2. Sampled only, not 100% tested.
3. In case of 70ns speed see High Speed AC Measurement conditions.
5/15
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