HRFZ44N
Data Sheet
December 2001
49A, 55V, 0.022 Ohm, N-Channel UltraFET
Power MOSFET
This N-Channel power MOSFET is
manufactured using the innovative
UltraFET™ process. This advanced
process technology achieves the
lowest possible on-resistance per silicon area, resulting in
outstanding performance. This device is capable of
withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, low-
voltage bus switches, and power management in portable
and battery-operated products.
Formerly developmental type TA75329.
Features
• 49A, 55V
• Simulation Models
- Temperature Compensated PSPICE
®
and SABER
©
Electrical Models
- Spice and Saber Thermal Impedance Models
- www.Fairchild.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
Ordering Information
PART NUMBER
HRFZ44N
PACKAGE
TO-220AB
BRAND
HRFZ44N
G
NOTE: When ordering, use the entire part number.
S
Packaging
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
©2001 Fairchild Semiconductor Corporation
HRFZ44N Rev. B
HRFZ44N
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
55
55
±
20
49
160
0.227
120
0.8
-55 to 175
300
260
UNITS
V
V
V
A
A
A
2
s
W
W/
o
C
o
C
o
C
o
C
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
Drain to Gate Voltage (R
GS
= 20k
Ω
) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Drain Current
Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 150
o
C.
2. Repetitive rating: pulse width limited by maximum junction temperature.
Electrical Specifications
PARAMETER
OFF STATE SPECIFICATIONS
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
BV
DSS
I
DSS
I
D
= 250
µ
A, V
GS
= 0V (Figure 11)
V
DS
= 50V, V
GS
= 0V
V
DS
= 45V, V
GS
= 0V, T
C
= 150
o
C
55
-
-
-
-
-
-
-
-
1
250
±
100
V
µ
A
µ
A
nA
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
SWITCHING SPECIFICATIONS
(V
GS
= 10V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Gate Charge at 10V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
I
GSS
V
GS
=
±
20V
V
GS(TH)
r
DS(ON)
V
GS
= V
DS
, I
D
= 250
µ
A (Figure 10)
I
D
= 25A, V
GS
= 10V (Figure 9)
2
-
-
0.019
4
0.022
V
Ω
R
θ
JC
R
θ
JA
(Figure 3)
TO-220
-
-
-
-
1.25
62
o
C/W
o
C/W
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
V
DD
= 30V, I
D
≅
25A,
R
L
= 1.2
Ω
, V
GS
=
10V,
R
GS
= 9.1
Ω
-
-
-
-
-
-
-
12
58
33
33
-
105
-
-
-
-
100
ns
ns
ns
ns
ns
ns
Q
g(TOT)
Q
g(10)
Q
g(TH)
Q
gs
Q
gd
V
GS
= 0V to 20V
V
GS
= 0V to 10V
V
GS
= 0V to 2V
V
DD
= 30V,
I
D
≅
25A,
R
L
= 1.2
Ω
I
g(REF)
= 1.0mA
(Figure 13)
-
-
-
-
-
60
35
2.0
4
14
75
43
2.5
-
-
nC
nC
nC
nC
nC
©2001 Fairchild Semiconductor Corporation
HRFZ44N Rev. B
HRFZ44N
Electrical Specifications
PARAMETER
CAPACITANCE SPECIFICATIONS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
C
ISS
C
OSS
C
RSS
V
DS
= 25V, V
GS
= 0V, f = 1MHz
(Figure 12)
-
-
-
1060
405
95
-
-
-
pF
pF
pF
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovered Charge
SYMBOL
V
SD
t
rr
Q
RR
I
SD
= 25A
I
SD
= 25A, dI
SD
/dt = 100A/
µ
s
I
SD
= 25A, dI
SD
/dt = 100A/
µ
s
TEST CONDITIONS
MIN
-
-
-
TYP
-
-
-
MAX
1.25
72
120
UNITS
V
ns
nC
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
I
D
, DRAIN CURRENT (A)
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
T
C
, CASE TEMPERATURE (
o
C)
150
175
60
50
40
30
20
10
0
25
50
75
100
125
150
175
T
C
, CASE TEMPERATURE (
o
C)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
2
1
THERMAL IMPEDANCE
Z
θJC
, NORMALIZED
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
P
DM
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJC
x R
θJC
+ T
C
10
-3
10
-2
t, RECTANGULAR PULSE DURATION (s)
10
-1
10
0
10
1
SINGLE PULSE
0.01
-5
10
10
-4
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
©2001 Fairchild Semiconductor Corporation
HRFZ44N Rev. B
HRFZ44N
Typical Performance Curves
1000
(Continued)
T
C
= 25
o
C
I
DM
, PEAK CURRENT (A)
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
I = I
25
175 - T
C
150
V
GS
= 10V
100
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10
10
-5
10
-4
10
-3
10
-2
t, PULSE WIDTH (s)
10
-1
10
0
10
1
FIGURE 4. PEAK CURRENT CAPABILITY
500
100
100µs
I
AS
, AVALANCHE CURRENT (A)
T
J
= MAX RATED
T
C
= 25
o
C
500
I
D
, DRAIN CURRENT (A)
If R = 0
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
100
STARTING T
J
= 25
o
C
10
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
BV
DS MAX
= 55V
1
1
10
1ms
10ms
STARTING T
J
= 150
o
C
100
200
10
0.001
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
0.1
0.01
1
t
AV
, TIME IN AVALANCHE (ms)
10
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
100
I
D
, DRAIN CURRENT (A)
V
GS
= 6V
60
I
D
, DRAIN CURRENT (A)
80
V
GS
= 20V
V
GS
= 10V
V
GS
= 8V
V
GS
= 7V
100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
80
175
o
C
60
-55
o
C
40
V
GS
= 5V
20
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T
C
= 25
o
C
0
1
2
3
4
5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
40
20
25
o
C
0
0
V
DD
= 15V
7.5
0
1.5
3.0
4.5
6.0
V
GS
, GATE TO SOURCE VOLTAGE (V)
FIGURE 7. SATURATION CHARACTERISTICS
FIGURE 8. TRANSFER CHARACTERISTICS
©2001 Fairchild Semiconductor Corporation
HRFZ44N Rev. B
HRFZ44N
Typical Performance Curves
2.5
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
(Continued)
V
GS
= 10V, I
D
= 49A
NORMALIZED GATE
THRESHOLD VOLTAGE
1.2
V
GS
= V
DS
, I
D
= 250µA
2.0
1.0
1.5
0.8
1.0
0.6
0.5
-80
-40
0
40
80
120
160
200
T
J
, JUNCTION TEMPERATURE (
o
C)
0.4
-80
-40
0
40
80
120
160
200
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
1.2
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
I
D
= 250µA
1800
1500
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
= C
DS
+ C
GD
1.1
C, CAPACITANCE (pF)
1200
900
600
C
OSS
300
C
RSS
C
ISS
1.0
0.9
0.8
-80
-40
0
40
80
120
160
200
0
0
10
20
30
40
50
60
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
8
6
4
2
V
DD
= 30V
0
0
5
10
15
20
WAVEFORMS IN
DESCENDING ORDER:
I
D
= 49A
I
D
= 36.75A
I
D
= 24.5A
I
D
= 12.25A
25
30
35
Q
g
, GATE CHARGE (nC)
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
©2001 Fairchild Semiconductor Corporation
HRFZ44N Rev. B
京公网安备 11010802033920号
EEWORLD
