DATASHEET
EL7242, EL7252
Dual Input, High Speed, Dual Channel Power MOSFET Driver
The EL7242/EL7252 dual input, 2-channel drivers achieve
the same excellent switching performance of the EL7212
family while providing added flexibility. The 2-input logic and
configuration is applicable to numerous power MOSFET
drive circuits. As with other Intersil drivers, the
EL7242/EL7252 are excellent for driving large capacitive
loads with minimal delay and switching times. “Shoot-thru”
protection and latching circuits can be implemented by
simply “cross-coupling” the 2-channels.
FN7285
Rev 5.00
September 3, 2015
Features
• Logic AND/NAND input
• 3V and 5V Input compatible
• Clocking speeds up to 10MHz
• 20ns Switching/delay time
• 2A Peak drive
• Isolated drains
• Low output impedance
• Low quiescent current
• Wide operating voltage — 4.5V to 16V
• Pb-free available (RoHS compliant)
Pinouts
EL7242
(8 LD PDIP, SOIC)
TOP VIEW
A IN 1
B IN 2
C IN 3
D IN 4
8 V+
7 OUT A
6 OUT B
5 GND
Applications
• Short circuit protected switching
• Undervoltage shut-down circuits
• Switch-mode power supplies
• Motor controls
EL7252
(8 LD PDIP, SOIC)
TOP VIEW
A IN 1
B IN 2
C IN 3
D IN 4
8 V+
7 OUT A
6 OUT B
5 GND
• Power MOSFET switching
• Switching capacitive loads
• Shoot-thru protection
• Latching drivers
Manufactured under U.S. Patent Nos. 5,334,883, #5,341,047
FN7285 Rev 5.00
September 3, 2015
Page 1 of 9
EL7242, EL7252
Ordering Information
PART NUMBER
EL7242CNZ (Note 1)
EL7242CSZ (Note 1)
EL7242CSZ-T7* (Note 1)
EL7242CSZ-T13* (Note 1)
EL7252CSZ (Note 1)
EL7252CSZ-T7* (Note 1)
EL7252CSZ-T13* (Note 1)
EL7252CN
(No longer available,
recommended replacement: EL7252CSZ)
PART MARKING
EL7242CN Z
7242CSZ
7242CSZ
7242CSZ
7252CSZ
7252CSZ
7252CSZ
EL7252CN
PACKAGE
8 Ld PDIP** (Pb-free)
8 Ld SOIC (Pb-free)
8 Ld SOIC (Pb-free)
8 Ld SOIC (Pb-free)
8 Ld SOIC (Pb-free)
8 Ld SOIC (Pb-free)
8 Ld SOIC (Pb-free)
8 Ld PDIP
E8.3
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
E8.3
PKG. DWG. #
*Please refer to TB347 for details on reel specifications.
**Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
FN7285 Rev 5.00
September 3, 2015
Page 2 of 9
EL7242, EL7252
Absolute Maximum Ratings
(T
A
= +25°C)
Supply (V+ to GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5V
Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V above V+
Combined Peak Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . .4A
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Thermal Information
Power Dissipation
8 Ld SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .570mW
8 Ld PDIP* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1050mW
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
Operating Conditions
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
DC Electrical Specifications
PARAMETER
INPUT
V
IH
I
IH
V
IL
I
IL
V
HVS
OUTPUT
R
OH
R
OL
I
PK
Pull-up Resistance
T
A
= +25°C, V = 15V, unless otherwise specified.
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DESCRIPTION
Logic “1' Input Voltage
Logic “1' Input Current
Logic “0' Input Voltage
Logic “0' Input Current
Input Hysteresis
@0V
@V+
2.4
0.1
10
0.8
0.1
0.3
10
V
µA
V
µA
V
I
OUT
= -100mA
I
OUT
= +100mA
Source
Sink
3
4
2
2
100
6
6
A
A
mA
Pull-down Resistance
Peak Output Current
I
DC
POWER SUPPLY
I
S
V
S
Continuous Output Current
Source/Sink
Power Supply Current
Operating Voltage
Inputs High
4.5
1
2.5
16
mA
V
AC Electrical Specifications
PARAMETER
SWITCHING CHARACTERISTICS
t
R
Rise Time (Note 2)
T
A
= +25°C, V = 15V, unless otherwise specified.
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DESCRIPTION
C
L
= 500pF
C
L
= 1000pF
10
20
10
20
20
20
25
25
ns
ns
ns
ns
ns
ns
t
F
Fall Time (Note 2)
C
L
= 500pF
C
L
= 1000pF
t
D-ON
t
D-OFF
NOTE:
Turn-On Delay Time (Note 2)
Turn-Off Delay Time (Note 2)
2. Limits established by characterization and are not production tested.
FN7285 Rev 5.00
September 3, 2015
Page 3 of 9
EL7242, EL7252
Timing Table
5V
INPUT 2.5V
0
INVERTED
OUTPUT
90%
10%
90%
10%
t
D1
t
F
t
R
t
D2
t
R
t
F
NON-INVERTED
OUTPUT
Standard Test Configuration
V+
3
4
4.7µF
TAN
7
OUTPUT
1000pF
LOAD
5
EL7242
1
2
INPUT
Simplified Schematic
V+
+
OUTPUT
INPUT
-
+
V
REF
INPUT
BUFFER
REFERENCE AND
LEVEL SHIFTER
INVERTING
BUFFER
WITH
HYSTERESIS
LOGIC
GATE
SUPER INVERTER
FN7285 Rev 5.00
September 3, 2015
Page 4 of 9
EL7242, EL7252
Typical Performance Curves
2.0
1.0
POWER DISSIPATION (W)
1.05W
0.8
0.6
0.4
0.2
0.0
SO8
JA
= 175°C/W
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
150
0.0
0
5
10
SUPPLY VOLTAGE
15
570mW
PDIP8
INPUT VOLTAGE
JA
= 95°C/W
MAX T
J
=
125°C
1.8
1.6
1.4
1.2
1.0
LOW LIMIT = 0.8V
HIGH LIMIT = 2.4V
HYSTERESIS
FIGURE 1. MAX POWER/DERATING CURVES
FIGURE 2. SWITCH THRESHOLD vs SUPPLY VOLTAGE
V - SUPPLY
0
10
2
2/DIV
0
N-CHANNEL
SINK (A)
-1
1
P-CHANNEL
-2
-10
-5
SOURCE (A)
15
10
5
0
I
IN
(mA)
0
V+
V
IN
2.5V/DIV
20
0
5
V - SUPPLY
10
15
FIGURE 3. INPUT CURRENT vs VOLTAGE
FIGURE 4. PEAK DRIVE vs SUPPLY VOLTAGE
8
SUPPLY CURRENT (mA)
7
6
5
4
3
2
1
0
0
5
10
15
SUPPLY VOLTAGE (V)
A
ON-RESISTANCE ()
B
C
CASE:
A ALL INPUTS GND
B 3 INPUTS GND
C 2 INPUTS GND
D
E
D 1 INPUT GND
E ALL INPUTS V+
8
MEASURED AT
100mA
PULL-DOWN
6
4
2
PULL-UP
0
5
10
SUPPLY VOLTAGE (V)
15
FIGURE 5. QUIESCENT SUPPLY CURRENT
FIGURE 6. ON-RESISTANCE vs SUPPLY VOLTAGE
FN7285 Rev 5.00
September 3, 2015
Page 5 of 9
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