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MAC97A8

Description
600 V, 0.6 A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-92
CategoryAnalog mixed-signal IC    Trigger device   
File Size134KB,6 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
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MAC97A8 Overview

600 V, 0.6 A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-92

MAC97A8 Parametric

Parameter NameAttribute value
MakerMotorola ( NXP )
Parts packaging codeTO-92
package instructionCYLINDRICAL, O-PBCY-T3
Contacts3
Reach Compliance Codeunknow
Other featuresSENSITIVE GATE
ConfigurationSINGLE
Critical rise rate of minimum off-state voltage25 V/us
Maximum DC gate trigger current5 mA
Maximum DC gate trigger voltage2 V
Maximum holding current10 mA
JEDEC-95 codeTO-92
JESD-30 codeO-PBCY-T3
JESD-609 codee0
Maximum leakage current0.1 mA
Number of components1
Number of terminals3
Maximum on-state voltage1.9 V
Maximum operating temperature110 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
Package shapeROUND
Package formCYLINDRICAL
Certification statusNot Qualified
Maximum rms on-state current0.6 A
Maximum repetitive peak off-state leakage current100 µA
Off-state repetitive peak voltage600 V
surface mountNO
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal locationBOTTOM
Trigger device type4 QUADRANT LOGIC LEVEL TRIAC
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MAC97/D
Silicon Bidirectional
Triode Thyristors
. . . designed for use in solid state relays, MPU interface, TTL logic and any other light
industrial or consumer application. Supplied in an inexpensive TO–92 package which
is readily adaptable for use in automatic insertion equipment.
One–Piece, Injection–Molded Unibloc Package
Sensitive Gate Triggering in Four Trigger Modes for all possible Combinations of
Trigger Sources, and Especially for Circuits that Source Gate Drives
All Diffused and Glassivated Junctions for Maximum Uniformity of Parameters
and Reliability
MAXIMUM RATINGS
(TJ = 25°C unless otherwise noted)
Rating
Peak Repetitive Off-State Voltage
(Gate Open, TJ = –40 to +110°C)(1)
1/2 Sine Wave 50 to 60 Hz, Gate Open
MAC97–4, MAC97A4
MAC97–6, MAC97A6
MAC97–8, MAC97A8
On-State RMS Current
Full Cycle Sine Wave 50 to 60 Hz (TC = +50°C)
Peak Non–repetitive Surge Current
(One Full Cycle, 60 Hz, TA = 110°C)
Circuit Fusing Considerations
TJ = –40 to +110°C (t = 8.3 ms)
Symbol
VDRM
Value
Unit
Volts
MAC97,A
IMPROVED
SERIES
(Device Date Code
9625 and Up)
Motorola preferred devices
TRIACs
0.8 AMPERE RMS
200 — 600 VOLTS
200
400
600
IT(RMS)
ITSM
I2t
VGM
0.8
8.0
0.26
5.0
5.0
0.1
1.0
–40 to +110
–40 to +150
Amp
Amps
A2s
Volts
Watts
Watt
Amp
°C
°C
MT1
MT2
G
v
2.0
m
s)
Peak Gate Power (t
v
2.0
m
s)
Peak Gate Voltage (t
Peak Gate Current (t
Average Gate Power (TC = 80°C, t
v
2.0
m
s)
v
8.3 ms)
PGM
PG(AV)
IGM
TJ
Tstg
MT1
G
MT2
Operating Junction Temperature Range
Storage Temperature Range
CASE 29–04
TO–226AA, STYLE 12
(TO–92)
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Symbol
R
θJC
R
θJA
Max
75
200
Unit
°C/W
°C/W
(1) VDRM for all types can be applied on a continuous basis. Blocking voltages shall not be
tested with a constant current source such that the voltage ratings of the devices are
exceeded.
Preferred
devices are Motorola recommended choices for future use and best overall value.
REV 2
Motorola Thyristor Device Data
©
Motorola, Inc. 1996
1

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Description 600 V, 0.6 A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-92 600 V, 0.6 A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-92 600 V, 0.6 A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-92 600 V, 0.6 A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-92 600 V, 0.6 A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-92 600 V, 0.6 A, 4 QUADRANT LOGIC LEVEL TRIAC, TO-92
Maker Motorola ( NXP ) Motorola ( NXP ) Motorola ( NXP ) Motorola ( NXP ) Motorola ( NXP ) Motorola ( NXP )
package instruction CYLINDRICAL, O-PBCY-T3 CYLINDRICAL, O-PBCY-T3 CYLINDRICAL, O-PBCY-T3 CYLINDRICAL, O-PBCY-T3 CYLINDRICAL, O-PBCY-T3 CYLINDRICAL, O-PBCY-T3
Reach Compliance Code unknow unknow unknow unknow unknow unknow
Other features SENSITIVE GATE SENSITIVE GATE SENSITIVE GATE SENSITIVE GATE SENSITIVE GATE SENSITIVE GATE
Configuration SINGLE SINGLE SINGLE SINGLE SINGLE SINGLE
Critical rise rate of minimum off-state voltage 25 V/us 25 V/us 25 V/us 25 V/us 25 V/us 25 V/us
Maximum DC gate trigger current 5 mA 5 mA 5 mA 10 mA 10 mA 10 mA
Maximum DC gate trigger voltage 2 V 2 V 2 V 2 V 2 V 2 V
Maximum holding current 10 mA 10 mA 10 mA 10 mA 10 mA 10 mA
JEDEC-95 code TO-92 TO-92 TO-92 TO-226AA TO-92 TO-226AA
JESD-30 code O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3
JESD-609 code e0 e0 e0 e0 e0 e0
Maximum leakage current 0.1 mA 0.1 mA 0.1 mA 0.1 mA 0.1 mA 0.1 mA
Number of components 1 1 1 1 1 1
Number of terminals 3 3 3 3 3 3
Maximum operating temperature 110 °C 110 °C 110 °C 110 °C 110 °C 110 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
Package shape ROUND ROUND ROUND ROUND ROUND ROUND
Package form CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum rms on-state current 0.6 A 0.6 A 0.6 A 0.6 A 0.6 A 0.6 A
Maximum repetitive peak off-state leakage current 100 µA 100 µA 100 µA 100 µA 100 µA 100 µA
Off-state repetitive peak voltage 600 V 200 V 400 V 400 V 600 V 200 V
surface mount NO NO NO NO NO NO
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
Terminal location BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
Trigger device type 4 QUADRANT LOGIC LEVEL TRIAC 4 QUADRANT LOGIC LEVEL TRIAC 4 QUADRANT LOGIC LEVEL TRIAC 4 QUADRANT LOGIC LEVEL TRIAC 4 QUADRANT LOGIC LEVEL TRIAC 4 QUADRANT LOGIC LEVEL TRIAC
Maximum on-state voltage 1.9 V 1.9 V 1.9 V - 1.9 V -

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