SM564163574N0UP
May 24, 2000
Revision History
• May 24, 2000
Added Command Truth Table, Mode Register Table and notes.
Modified waveforms ( Auto Refresh (CBR) cycle and Power Down Mode and Clock Mask).
• November 3, 1999
Corrected column addresses from A0~A7 to A0~A8 on page 3.
• August 17, 1999
Datasheet released.
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
36 Linford Forum, Rockingham Dr., Linford Wood, Milton Keynes, MK14 6LY, UK • Tel: +44-1908 234030 • Fax: +44-1908-234191
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
1
SM564163574N0UP
May 24, 2000
128MByte (16M x 64) Synchronous DRAM Module - 8Mx16 based
168-pin DIMM, Unbuffered
Features
•
•
•
•
•
•
•
Standard
Configuration
Cycle Time
CAS# Latency
Burst Length
Burst Type
No. of Internal
Banks per SDRAM
• Operating Voltage
• Refresh
• Device Physicals
Functional Diagram
DQMB5
DQMB4
DQMB1
DQMB0
CS0#
CLK0
CKE0
DQMB2
DQMB3
DQMB6
DQMB7
CS2#
CLK2
:
:
:
:
:
:
:
:
:
:
PC-100 (Rev 1.0)
Non-parity
10ns
2&3/3
1, 2, 4, 8 or Page
Linear/Interleave
4
3.3V
4K
400mil TSOP
•
•
•
•
Lead Finish
:
Gold
Length x Height
:
133.35mm x 34.93mm
No. of sides
:
Double-sided
Mating Connector (Examples)
Vertical
:
AMP-382830-6
8Mx16
SDRAM
8Mx16
SDRAM
8Mx16
SDRAM
8Mx16
SDRAM
CS1#
CLK1
CKE1
8Mx16
SDRAM
8Mx16
SDRAM
8Mx16
SDRAM
8Mx16
SDRAM
CS3#
CLK3#
DQ0~DQ15
Notes
1.
2.
3.
4.
5.
6.
7.
:
A0~A11, BA0 and BA1 to all SDRAMs.
RAS#, CAS# and WE# to all devices.
Data is terminated with 10Ω series resistors.
CKE1 has a 10KΩ pull-up to V
DD
.
DQ32~DQ47
DQ16~DQ31
DQ48~DQ63
DQ0~DQ63
SA0~SA2
SCL
WP
A0~A2
SCL
SDA
WP
SERIAL PD
EEPROM
SDA
V
DD
V
SS
CLK signals are terminated with series resistors and/or
padding capacitors depending on load per clock.
WP signal has a pull-down resistor of 47KΩ.
Refer to note on page 3 for details on DQM control scheme.
Decoupling capacitors
to all devices.
( All specifications of this device are subject to change without notice.)
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
36 Linford Forum, Rockingham Dr., Linford Wood, Milton Keynes, MK14 6LY, UK • Tel: +44-1908 234030 • Fax: +44-1908-234191
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
2
SM564163574N0UP
May 24, 2000
Pin Name
A0~A11
A0~A8
BA0, BA1
DQ0~DQ63
CLK0~CLK3
RAS#
CAS#
CKE0, CKE1
DQMB0~DQMB7
Row Addresses
Column Addresses
Bank Select Addresses
Data Inputs/Outputs
Clock Inputs
Row Address Strobe
Column Address Strobe
Clock Enable
DQ Mask Enables
CS0#~CS3#
WE#
SA0~SA2
SDA
SCL
WP
V
DD
V
SS
NC
Chip Selects
Write Enable
Decode Inpurs
Serial Data Input/Output
Serial Clock
Serial EEPROM Write Protect
Power Supply
Ground
No Connection
Note:
DQMs v/s Data I/Os
DQMB0 controls DQ0~DQ7
DQMB1 controls DQ8~DQ15
DQMB2 controls DQ16~DQ23
DQMB3 controls DQ24~DQ31
DQMB4 controls DQ32~DQ39
DQMB5 controls DQ40~DQ47
DQMB6 controls DQ48~DQ55
DQMB7 controls DQ56~DQ63
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
Pin
Designation
V
SS
DQ0
DQ1
DQ2
DQ3
V
DD
DQ4
DQ5
DQ6
DQ7
DQ8
V
SS
DQ9
DQ10
DQ11
DQ12
DQ13
V
DD
DQ14
DQ15
NC
NC
V
SS
NC
NC
V
DD
WE#
DQMB0
DQMB1
CS0#
NC
V
SS
A0
A2
A4
A6
A8
A10/AP (Note*)
BA1
V
DD
V
DD
CLK0
Pin
No.
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Pin
Designation
V
SS
NC
CS2#
DQMB2
DQMB3
NC
V
DD
NC
NC
NC
NC
V
SS
DQ16
DQ17
DQ18
DQ19
V
DD
DQ20
NC
NC
CKE1
V
SS
DQ21
DQ22
DQ23
V
SS
DQ24
DQ25
DQ26
DQ27
V
DD
DQ28
DQ29
DQ30
DQ31
V
SS
CLK2
NC
WP
SDA
SCL
V
DD
Pin
No.
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
Pin
Designation
V
SS
DQ32
DQ33
DQ34
DQ35
V
DD
DQ36
DQ37
DQ38
DQ39
DQ40
V
SS
DQ41
DQ42
DQ43
DQ44
DQ45
V
DD
DQ46
DQ47
NC
NC
V
SS
NC
NC
V
DD
CAS#
DQMB4
DQMB5
CS1#
RAS#
V
SS
A1
A3
A5
A7
A9
BA0
A11
V
DD
CLK1
NC
Pin
No.
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
Pin
Designation
V
SS
CKE0
CS3#
DQMB6
DQMB7
NC
V
DD
NC
NC
NC
NC
V
SS
DQ48
DQ49
DQ50
DQ51
V
DD
DQ52
NC
NC
NC
V
SS
DQ53
DQ54
DQ55
V
SS
DQ56
DQ57
DQ58
DQ59
V
DD
DQ60
DQ61
DQ62
DQ63
V
SS
CLK3
NC
SA0
SA1
SA2
V
DD
Note* :
A10/AP initiates Auto-precharge.
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
36 Linford Forum, Rockingham Dr., Linford Wood, Milton Keynes, MK14 6LY, UK • Tel: +44-1908 234030 • Fax: +44-1908-234191
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
3
SM564163574N0UP
May 24, 2000
DC Characteristics
Absolute Maximum Ratings
Parameter
Voltage on any pin relative to V
SS
Voltage on supply pins relative to V
SS
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
V
IN,
V
OUT
V
DDT
P
T
T
opr
T
stg
Ratings
- 1.0 to 4.6
- 1.0 to 4.6
8
0 to +70
- 55 to +150
Unit
V
V
W
°C
°C
Recommended DC Operating Conditions
(T
A
= 0 to +70°C)
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Symbol
V
DD
V
SS
V
IH
V
IL
Min
3.0
0
2.0
-0.3
Typ
3.3
0
-
-
Max
3.6
0
V
DD
+0.3
0.8
Unit
V
V
V
V
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
36 Linford Forum, Rockingham Dr., Linford Wood, Milton Keynes, MK14 6LY, UK • Tel: +44-1908 234030 • Fax: +44-1908-234191
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
4
SM564163574N0UP
May 24, 2000
DC Characteristics (cont’d)
Capacitance
(V
DD
= 3.3V±0.3V, T
A
= +25°C, f = 1MHz)
Parameter
Input Capacitance (Address, WE#, RAS#, CAS#)
Input Capacitance (DQMB0~DQMB7, CS#)
Input Capacitance (CKEs)
Input Capacitance (CLKs)
Input/Output Capacitance (DQ0~DQ63)
Notes : Capacitance is sampled per Mil-Std-883.
Symbol
C
I1
C
I2
C
I3
C
I4
C
I/O
Max
50
20
30
35
24
Unit
pF
pF
pF
pF
pF
(V
DD
= 3.3V±0.3V, V
SS
= 0V, T
A
= 0 to +70°C)
Parameter
Input Leakage Current*
Output Leakage Current
Output High Voltage
Output Low Voltage
Symbol
I
LI
I
LO
V
OH
V
OL
Test Conditions
0V
≤
V
in
≤
V
DD
+0.3V
0V
≤V
out
≤
V
DD
D
out
= Disable
High I
out
= -2mA
Low I
out
= 2mA
2.4
-
-
0.4
V
V
Min
-40
-10
10ns
Max
40
10
Unit
µA
µA
*Note : Except for WP (0.07mA) pin.
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
36 Linford Forum, Rockingham Dr., Linford Wood, Milton Keynes, MK14 6LY, UK • Tel: +44-1908 234030 • Fax: +44-1908-234191
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
5
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