MB86612 datasheet, PDF - EEWORLD Datasheet

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MB86612: DescriptionIEEE 1394 Bus Controller (for MPEG, DVC); CategoryThe embedded processor and controller Microcontrollers and processors; File Size219KB，40 Pages; ManufacturerFUJITSU; Websitehttp://edevice.fujitsu.com/fmd/en/index.html

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MB86612 Overview

IEEE 1394 Bus Controller (for MPEG, DVC)

MB86612 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	FUJITSU
Parts packaging code	QFP
package instruction	LFQFP, QFP100,.63SQ,20
Contacts	100
Reach Compliance Code	compli
Address bus width	5
boundary scan	NO
maximum clock frequency	8.192 MHz
Maximum data transfer rate	12.288 MBps
External data bus width	16
JESD-30 code	S-PQFP-G100
JESD-609 code	e0
length	14 mm
low power mode	YES
Number of serial I/Os	2
Number of terminals	100
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP100,.63SQ,20
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	1.7 mm
Maximum slew rate	300 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	14 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL

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FUJITSU SEMICONDUCTOR

DATA SHEET

DS04-22001-1E

ASSP Communication Control

IEEE 1394 Bus Controller

(for MPEG, DVC)

MB86612

DESCRIPTION

The MB86612 is 1394 serial bus controller exclusively for MPEG and DVC data transfer, compatible with the

IEEE 1394 “FireWire” standard (IEEE Standard 1394-1995). Two built-in ports plus a differential transceiver and

comparator are provided to enable formation of networks in a 1394 cable environment. The MB86612 supports

s100 data transfer speeds.

By integrating the physical layer and link layer on one chip, The MB86612 is designed to reduce mounting area

as well as power consumption.

The MB86612 has an exclusive data port for isochronous transfer, provides automatic packetizing and separation

of header and data units, and is optimized for continuity of transfer processing.

The MB86612 supports MPEG and DVC AV/C protocols, and includes the necessary built-in automatic

operations and CSR’s for providing the necessary operations for MPEG and DVC data transfer.

FEATURES

Compatible with IEEE 1394 high-performance serial bus standards

Physical layer and link layer integrated on one chip

2 cable ports

Supports s100 transfer speed (98.304 Mbit/sec)

3.3V single power supply operation

Built-in PLL (for crystal oscillator) for internal clock signal generation

Power saving modes

1) Forced sleep mode at instruction from MPU

2) Automatic sleep mode for non-connected ports

• Header and data units automatically separated at receiving and automatic packetizing for sending

• Supports cycle master functions

(Continued)

•

PACKAGES

100-pin plastic LQFP

120-pin plastic FBGA

(FPT-100P-M05)

(BGA-120P-M01)

MB86612 Related Products

	MB86612	MB86612PFV	MB86612PBT
Description	IEEE 1394 Bus Controller (for MPEG, DVC)	IEEE 1394 Bus Controller (for MPEG, DVC)	IEEE 1394 Bus Controller (for MPEG, DVC)
Is it Rohs certified?	incompatible	incompatible	incompatible
Maker	FUJITSU	FUJITSU	FUJITSU
Parts packaging code	QFP	QFP	BGA
package instruction	LFQFP, QFP100,.63SQ,20	LFQFP, QFP100,.63SQ,20	LFBGA, BGA120,13X13,32
Contacts	100	100	120
Reach Compliance Code	compli	compli	compli
Address bus width	5	5	5
boundary scan	NO	NO	NO
maximum clock frequency	8.192 MHz	8.192 MHz	8.192 MHz
Maximum data transfer rate	12.288 MBps	12.288 MBps	12.288 MBps
External data bus width	16	16	16
JESD-30 code	S-PQFP-G100	S-PQFP-G100	S-PBGA-B120
JESD-609 code	e0	e0	e0
length	14 mm	14 mm	12 mm
low power mode	YES	YES	YES
Number of serial I/Os	2	2	2
Number of terminals	100	100	120
Maximum operating temperature	70 °C	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFQFP	LFQFP	LFBGA
Encapsulate equivalent code	QFP100,.63SQ,20	QFP100,.63SQ,20	BGA120,13X13,32
Package shape	SQUARE	SQUARE	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH
power supply	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.7 mm	1.7 mm	1.45 mm
Maximum slew rate	300 mA	300 mA	300 mA
Maximum supply voltage	3.6 V	3.6 V	3.6 V
Minimum supply voltage	3 V	3 V	3 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	GULL WING	BALL
Terminal pitch	0.5 mm	0.5 mm	0.8 mm
Terminal location	QUAD	QUAD	BOTTOM
width	14 mm	14 mm	12 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Bus compatibility	-	68XX; 80XX	68XX; 80XX
Peak Reflow Temperature (Celsius)	-	NOT SPECIFIED	NOT SPECIFIED
Maximum time at peak reflow temperature	-	NOT SPECIFIED	NOT SPECIFIED

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