FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-12531-2E
8-bit Proprietary Microcontroller
CMOS
F MC-8L MB89630R Series
MB89635R/T635R/636R/637R/T637R
MB89P637/W637/PV630
s
OUTLINE
The MB89630R series has been developed as a general-purpose version of the F
2
MC*-8L family consisting of
proprietary 8-bit, single-chip microcontrollers.
In addition to a compact instruction set, the microcontrollers contain a variety of peripheral functions such as
dual-clock control system, five operating speed control stages, a UART, timers, a PWM timer, a serial interface,
an A/D converter, an external interrupt, and a watch prescaler.
*: F
2
MC stands for FUJITSU Flexible Microcontroller.
2
s
FEATURES
• High-speed operating capability at low voltage
• Minimum execution time: 0.4
µs@3.5
V, 0.8
µs@2.7
V
• F
2
MC-8L family CPU core
Multiplication and division instructions
16-bit arithmetic operations
Test and branch instructions
Bit manipulation instructions, etc.
Instruction set optimized for controllers
• Five types of timers
8-bit PWM timer: 2 channels (Also usable as a reload timer)
8-bit pulse-width count timer (Continuous measurement capable, applicable to remote control, etc.)
16-bit timer/counter
21-bit timebase timer
• UART
CLK-synchronous/CLK-asynchronous data transfer capable (6, 7, and 8 bits)
• Serial interface
Switchable transfer direction to allows communication with various equipment.
• 10-bit A/D converter
Start by an external input capable
(Continued)
MB89630R Series
(Continued)
• External interrupt: 4 channels
Four channels are independent and capable of wake-up from low-power consumption modes (with an edge
detection function).
• Low-power consumption modes
Stop mode (Oscillation stops to minimize the current consumption.)
Sleep mode (The CPU stops to reduce the current consumption to approx. 1/3 of normal.)
Subclock mode
Watch mode
• Bus interface function
With hold and ready function
s
PACKAGE
64-pin Plastic SH-DIP
64-pin Plastic QFP
64-pin Plastic QFP
(DIP-64P-M01)
(FPT-64P-M06)
(FPT-64P-M09)
64-pin Ceramic SH-DIP
64-pin Ceramic MQFP
64-pin Ceramic MDIP
(DIP-64C-A06)
(MQP-64C-P01)
(MDP-64C-P02)
2
MB89630R Series
s
PRODUCT LINEUP
Part number
Item
MB89635R MB89636R MB89637R MB89T635R MB89T637R MB89P637 MB89W637 MB89PV630
Classification
Mass-produced products
(mask ROM products)
External ROM
products
One-time
PROM
product
Piggyback/
evaluation
EPROM product (for
product evaluation
and
development)
ROM size
32 K
×
8 bits
(internal
(internal
(internal
(Internal PROM, to be 32 K
×
8 bits
mask ROM) mask ROM) mask ROM) Fixed to external ROM programmed with
(external
general-purpose
ROM)
EPROM programmer)
16 K
×
8 bits 24 K
×
8 bits 32 K
×
8 bits
RAM size
CPU functions
512
×
8 bits 768
×
8 bits 1024
×
8 bits 512
×
8 bits
The number of instructionns:
Instruction bit length:
Instruction length:
Data bit length:
Minimum execution time:
Interrupt processing time:
Input ports:
Output ports (N-ch open-drain):
I/O ports (N-ch open-drain):
Output ports (CMOS):
I/O ports (CMOS):
Total:
1024
×
8 bits
1 K
×
8 bits
136
8 bits
1 to 3 bytes
1, 8, 16 bits
0.4 to 6.4
µs/10
MHz, 61
µs@32.768
kHz
3.6 to 57.6
µs/10
MHz, 562.5
µs@32.768
kHz
5 (All also serve as peripherals.)
8 (All also serve as peripherals.)
4 (All also serve as peripherals.)
8 (All also serve as bus control.)
28 (27 ports also serve as bus pins and peripherals.)
53
Ports
Clock timer
8-bit PWM
timer
8-bit pulse
width count
timer
16-bit timer/
counter
8-bit serial I/O
21 bits
×
1 (in main clock)/15 bits
×
1 (at 32.768 kHz)
8-bit reload timer operation (toggled output capable, operating clock cycle: 0.4
µs
to 3.3 ms)
×
2
channels
7/8-bit resolution PWM operation (conversion cycle: 51.2
µs
to 839 ms)
×
2 channels
8-bit timer operation (overflow output capable, operating clock cycle: 0.4 to 12.8
µs)
8-bit reload timer operation (toggled output capable, operating clock cycle: 0.4 to 12.8
µs)
8-bit pulse width measurement operation (capable of continuous measurement, and
measurement of “H” pulse width/ “L” pulse width/ from
↑
to
↑/from ↓
to
↓)
16-bit timer operation (operating clock cycle: 0.4
µs)
16-bit event counter operation (rising edge/falling edge/both edge selectable)
8 bits
LSB first/MSB first selectable
One clock selectable from four transfer clocks
(one external shift clock, three internal shift clocks: 0.8
µs,
3.2
µs,
12.8
µs)
Capable of switching two I/O systems by software
Transfer data length (6, 7, and 8 bits)
Transfer rate (300 to 62500 bps. at 10 MHz osciliation)
10-bit resolution
×
8 channels
A/D conversion mode (conversion time: 13.2
µs)
Sense mode (conversion time: 7.2
µs)
Capable of continuous activation by an external activation or an internal timer
UART
10-bit A/D
converter
(Continued)
3
MB89630R Series
(Continued)
Part number
Item
MB89635R MB89636R MB89637R MB89T635R MB89T637R MB89P637 MB89W637 MB89PV630
External
interrupt input
Standby mode
Process
Operating
voltage*
EPROM for use
4 independent channels (edge selection, interrupt vector, source flag).
Rising edge/falling edge selectable
Used also for wake-up from stop/sleep mode. (Edge detection is also permitted in stop mode.)
Sleep mode, stop mode, watch mode, and subclock mode
CMOS
2.2 V to 6.0 V
2.7 V to 6.0 V
MBM27C256A-20CZ
MBM27C256A-20TV
* : Varies with conditions such as the operating frequency. (See section “s Electrical Characteristics.”)
In the case of the MB89PV630, the voltage varies with the restrictions of the EPROM for use.
s
PACKAGE AND CORRESPONDING PRODUCTS
Package
DIP-64P-M01
FPT-64P-M06
FPT-64P-M09
DIP-64C-A06
MQP-64C-P01
MDP-64C-P02
: Available
×
×
×
×
×
×
×*
×
×
×
×
×
MB89635R
MB89T635R
MB89636R
MB89637R
MB89T637R
MB89P637
MB89W637
×
×
×*
MB89PV630
×
×
×*
×
×:
Not available
* : To convert pin pitches, an adapter socket (manufacturer: Sun Hayato Co., Ltd.) is available.
64SD-64QF2-8L: For conversion from (DIP-64P-M01, DIP-64C-A06, or MDP-64C-P02) to FPT-64P-M09
Inquiry: Sun Hayato Co., Ltd.: TEL (81)-3-3986-0403
FAX (81)-3-5396-9106
Note: For more information about each package, see section “s Package Dimensions.”
4
MB89630R Series
s
DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the piggyback product, verify its differences from the product that will actually be used.
Take particular care on the following points:
On the MB89P637/W637, the program area starts from address 8007
H
but on the MB89PV630 and MB89637R
starts from 8000
H
.
• On the MB89P637/W637, addresses 8000
H
to 8006
H
comprise the option setting area, option settings can be
read by reading these addresses. On the MB89PV630/MB89637R, addresses 8000
H
to 8006
H
could also be
used as a program ROM. However, do not use these addresses in order to maintain compatibility of the
MB89P637/W637.
• The stack area, etc., is set at the upper limit of the RAM.
• The external area is used.
2. Current Consumption
• In the case of the MB89PV630, add the current consumed by the EPROM which connected to the top socket.
• When operated at low speed, the product with an OTPROM (one-time PROM) or an EPROM will consume
more current than the product with a mask ROM. However, the current consumption in sleep/stop modes is
the same. (For more information, see sections “s Electrical Characteristics” and “s Example Characteristics.”)
3. Mask Options
Functions that can be selected as options and how to designate these options vary by the product.
Before using options check section “s Mask Options.”
Take particular care on the following points:
• A pull-up resistor cannot be set for P50 to P53 on the MB89P637 and MB89W637.
• Options are fixed on the MB89PV630, MB89T635R, and MB89T637R.
4. Differences between the MB89630 and MB89630R Series
• Memory access area
There are no difference between the access area of MB89635/MB89635R, and that of MB89637/MB89637R.
The access area of MB89636 is different from that of the MB89636R when using in external bus mode.
Address
0000
H
to 007F
H
0080
H
to 037F
H
0380
H
to 047F
H
0480
H
to 7FFF
H
8000
H
to 9FFF
H
A000
H
to FFFF
H
ROM area
External area
I/O area
RAM area
Memory area
MB89636
I/O area
RAM area
Access prohibited
External area
Access prohibited
ROM area
MB89636R
5
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