FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-28823-2E
ASSP Image Control
CMOS
Intelligent On-screen Display
Controller (IOSDC)
MB90091A
s
DESCRIPTION
The MB90091A is the multisync, on-screen display controller that supports a variety of TV systems such as
NTSC, PAL, double-scan NTSC, double-scan PAL, 1250HDTV, and 1125HDTV as well as personal computer
monitor display systems such as VGA and XGA.
The MB90091A contains display memory (VRAM) and character font ROM, allowing characters to be displayed
with few external devices. The device also contains command table ROM storing display command data,
minimizing the load on the microcomputer.
The on-screen display configuration is up to 24 characters
×
12 lines, with each character consisting of 24
×
32
dots. The font ROM integrates 512 different character patterns.
The character signal output is an RGB1 digital output. The display color of each character can be specified
from among 16 colors. A color/monochrome select signal output is also provided for display either in 16 different
colors or in 16-level gray scale.
The character display functions include character background display, shaded background display, and sprite
character display functions, contributing to providing colorful display screens.
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PACKAGES
64 pin, Plastic SH-DIP
64 pin, Plastic QFP
(DIP-64P-M01)
(FPT-64P-M06)
MB90091A
s
FEATURES
• Screen display capacity
• Font size
• Font types
: Up to 24 characters x 12 lines (288 characters)
: 24 x 32 dots (horizontal x vertical)
: 512 different characters (character codes 000H to 1FFH)
8 different sprite characters (character codes 1F8H to 1FFH)
(Internal or external ROM selectable)
: Trimmed display (pattern background 0, 1, or none)
Character background (settable for each character)
Shaded background (settable for each character)
: Capable of displaying one character (selectable from among 8 types of char-
acters) on the screen
Sprite character colors : 8 colors
Sprite trimming colors : 8 colors
Sprite display position : Settable in 2-dot units on the screen
: Normal, double width, double height, double width x double height, quadruple
width, quadruple width x double height
(Set for each line)
: Character color
Trimmed background color
Character background color
Screen background color
:
:
:
:
16 colors (set for each character)
16 colors (set for each line)
16 colors (set for each character)
16 colors
• Display modes
• Sprite character display
• Character sizes
• Display colors
• Display position control
: Horizontal display start position : Set in 8-dot units
Vertical display start position
: Set in 2-dot units
Line spacing control
: Set in 2-dot units (0 to 30 dots)
• Character/color signal output : ROUT, GOUT, BOUT, IOUT (color signals)
COLOR (color/monochrome control signal)
VOB1 (character + pattern background + character background + screen
background: all-output signal)
VOB2 (character + pattern background + character background: specified-
character output signal)
• Supported TV systems
: NTSC, PAL, double-scan NTSC, double-scan PAL, 1250HDTV, 1125HDTV,
etc.
Personal computer monitor display systems such as VGA
: Automatic control of operation using on command table ROM
Command table ROM: Internal 32K bytes + external 32K bytes available
• Intelligent features
• Microcontroller/microcomputer interface : 8-bit serial input (3 signal input pins
Chip select: SCS
Serial clock: SCLK
Serial data: SIN
• Package
• Miscellaneous
: SH-DIP-64, QFP-64
: Power-on reset circuit integrated
2
MB90091A
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PIN ASSIGNMENTS
(TOP VIEW)
COLOR
DOCK
V
SS
TESTCK
TESTSW
HBLNK
VBLNK
HSYNC
VSYNC
EVEN
FLTIN
AV
SS
FLTOUT
AV
CC
FH
RESET
V
CC
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
TEST
V
SS
TA16
TA17
TA18
FCS
TCS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
VOB2
VOB1
IOUT
BOUT
GOUT
ROUT
TRE
V
CC
SCS
SIN
SCLK
FSEL
TSEL
RA15
RA14
RA13
RA12
V
SS
RA11
RA10
RA9
RA8
RA7
RA6
RA5
V
SS
RA4
V
CC
RA3
RA2
RA1
RA0
(SH-DIP-64P)
(Continued)
3
MB90091A
(Continued)
(TOP VIEW)
VBLNK
HBLNK
TESTSW
TESTCK
V
SS
DOCK
COLOR
VOB2
VOB1
IOUT
BOUT
GOUT
ROUT
HSYNC
VSYNC
EVEN
FLTIN
AV
SS
FLTOUT
AV
CC
FH
RESET
V
CC
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
TEST
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
TRE
V
CC
SCS
SIN
SCLK
FSEL
TSEL
RA15
RA14
RA13
RA12
V
SS
RA11
RA10
RA9
RA8
RA7
RA6
RA5
4
V
SS
TA16
TA17
TA18
FCS
TCS
RA0
RA1
RA2
RA3
V
CC
RA4
V
SS
(FPT-64P-M06)
MB90091A
s
PIN DESCRIPTION
Pin No.
DIP
8
9
QFP
1
2
Pin name
HSYNC
VSYNC
I/O
I
I
Function
Horizontal sync signal input pin
Dot clock generation is based on the cycle of the signal.
Vertical sync signal input pin
Field control signal input pin
Input of an “L” level signal to this pin causes the font ROM address
LSB pin (RA0) to output an “L” level signal.
Input of an “H“ level signal to this pin causes the font ROM address
LSB pin (RA0) to output an “H” level signal (when normal-size
characters are displayed).
This pin is disabled in noninterlaced mode.
Output pin for horizontal-sync phase comparison result signal
This pin is connected to an external lowpass filter.
Internal VCO voltage input pin
This pin inputs the voltage signal from the external lowpass filter.
Output pin for AFC-generated horizontal sync signal
Reset pin
This pin is enabled after release from a power-on reset.
10
3
EVEN
I
11
13
15
16
18
19
20
21
22
23
24
25
26
28
29
30
31
32
4
6
8
9
11
12
13
14
15
16
17
18
19
21
22
23
24
25
FLTIN
FLTOUT
FH
RESET
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
TEST
TA16
TA17
TA18
FCS
TCS
O
I
O
I
I
External ROM data input pin
This pin inputs data from external font ROM or external command
data ROM.
I
O
O
O
Test signal input pin
This pin inputs an “L” level (fixed) signal during normal operation.
Test signal output pin
External font ROM chip select pin
Chip select pin for external command table ROM
(Continued)
5
Analogue and Mixed Signal
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