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Regarding the change of names mentioned in the document, such as Hitachi
Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
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Renesas Technology Home Page: http://www.renesas.com
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
Cautions
Keep safety first in your circuit designs!
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and more reliable, but there is always the possibility that trouble may occur with them. Trouble with
semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate
measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or
(iii) prevention against any malfunction or mishap.
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contained therein.
HD74HC164
8-bit Parallel-out Shift Register
ADE-205-456 (Z)
1st. Edition
Sep. 2000
Description
This 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flip-
flop. Inputs A & B permit complete control over the incoming data. A low at either or both inputs inhibits
entry of new data and resets the first flip-vlop to the low level at the next clock pulse. A high level on the
input enables the other input which will then determine the state of the first flip-flop. Data at the serial
inputs may be changed while the clock is high or low, but only information meeting the setup and hold time
requirements will be entered. Data is serially shifted in and out of the 8-bit register during the positive
going transition of the clock pulse. Clear is independent of the clock and accomplished by a low level at
the clear input.
Features
•
High Speed Operation: t
pd
(Clock to Q) = 14.5 ns typ (C
L
= 50 pF)
•
High Output Current: Fanout of 10 LSTTL Loads
•
Wide Operating Voltage: V
CC
= 2 to 6 V
•
Low Input Current: 1
µA
max
•
Low Quiescent Supply Current: I
CC
(static) = 4
µA
max
Function Table
Inputs
Clear
L
H
H
H
H
Clock
X
A
X
X
L
X
H
B
X
X
X
L
H
Outputs
Q
A
L
Q
Ao
L
L
H
Q
B
L
Q
Bo
Q
An
Q
An
Q
An
·········
·········
·········
·········
·········
·········
Q
H
L
Q
Ho
Q
Gn
Q
Gn
Q
Gn
Q
Ao
to Q
Ho
= Outputs remain unchanged.
Q
An
to Q
Gn
= Data shifted from the previous stage on a positive edge at the clock input.
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