ICS2305
3.3 V
OLT
Z
ERO
D
ELAY
, L
OW
S
KEW
B
UFFER
Description
The ICS2305 is a low phase noise, high-speed PLL
based, low-skew zero delay buffer. Based on ICS’
proprietary low jitter Phase Locked Loop (PLL)
techniques, the device provides four low skew outputs
at speeds up to 133 MHz at 3.3 V. The outputs can be
generated from the PLL (for zero delay), or directly
from the input (for testing), and can be set to tri-state
mode or to stop at a low level. The PLL feedback is
on-chip and is obtained from the CLKOUT pad.
The ICS2305 is available in two different versions. The
ICS2305-1 is the base part. The ICS2305-1H is a high
drive version with faster rise and fall times.
Features
•
•
•
•
•
•
•
•
•
•
•
•
Clock outputs from 10 to 133 MHz
Zero input-output delay
Four low skew (<250 ps) outputs
Device-to-device skew <700 ps
Full CMOS outputs with 25 mA output drive
capability at TTL levels
5 V tolerant CLKIN
Tri-state mode for board-level testing
Advanced, low power, sub-micron CMOS process
Operating voltage of 3.3 V
Industrial temperature range available
Packaged in 8-pin SOIC
Available in Pb (lead ) free package
Block Diagram
VDD
CLKIN
PLL
CLKOUT
CLK1
CLK2
CLK3
CLK4
GND
MDS 2305 D
I n t e gra te d C i r c u i t S y s te m s
●
1
52 5 Ra ce Street, San Jose, CA 9 512 6
●
Revision 022505
tel (408 ) 297 -120 1
●
w ww.i c s t. c om
ICS2305
3.3 V
OLT
Z
ERO
D
ELAY
, L
OW
S
KEW
B
UFFER
Pin Assignment
CLKIN
CLK2
CLK1
GND
1
2
3
4
8
7
6
5
CLKOUT
CLK4
VDD
CLK3
8 pin ( 150 mil ) SOIC
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
Pin
Name
CLKIN
CLK2
CLK1
GND
CLK3
VDD
CLK4
CLKOUT
Pin Type
Input
Output
Power
Power
Output
Power
Output
Output
Clock input (5 V tolerant).
Buffered Clock output 2.
Buffered Clock output 1
Connect to ground.
Buffered Clock output 3
Power supply. Connect to 3.3 V.
Buffered Clock output 4.
Buffered output. Internall feedback on this pin.
Pin Description
MDS 2305 D
In te grated Circuit Systems
●
2
5 25 Race Stree t, San Jose, CA 951 26
●
Revision 022505
te l (40 8) 2 97-12 01
●
www.icst.com
ICS2305
3.3 V
OLT
Z
ERO
D
ELAY
, L
OW
S
KEW
B
UFFER
External Components
The ICS2305 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.01 mF should be connected between VDD and GND on pins 4 and 5, and VDD and GND
on pins 13 and 12, as close to the device as possible. A series termination resistor of 33
Ω
may be used to
each clock output pin to reduce reflections.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS2305. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
CLKIN and FBIN inputs
Electrostatic Discharge (HBM)
Ambient Operating Temperature (Commercial)
Ambient Operating Temperature (Industrial)
Storage Temperature
Junction Temperature
Soldering Temperature
7V
Rating
-0.5 V to VDD+0.5 V
-0.5 V to 5.5 V
2000 V
0 to +70
°
C
-40 to +85
°
C
-65 to +150
°
C
150
°
C
260
°
C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature (Industrial)
Ambient Operating Temperature (Commercial)
Power Supply Voltage (measured in respect to GND)
Min.
-40
0
+3.0
Typ.
Max.
+85
+70
+3.6
Units
°
C
°
C
V
MDS 2305 D
In te grated Circuit Systems
●
3
5 25 Race Stree t, San Jose, CA 951 26
●
Revision 022505
te l (40 8) 2 97-12 01
●
www.icst.com
ICS2305
3.3 V
OLT
Z
ERO
D
ELAY
, L
OW
S
KEW
B
UFFER
DC Electrical Characteristics
ICS2305M-XX
,
VDD = 3.3 V ±10%,
Ambient Temperature -40 to +85
°
C(Industrial), (0-70
°
C Commercial)
Parameter
Operating Voltage
Input High Voltage
Input Low Voltage
Input Low Current
Input High Current
Output High Voltage
Output Low Voltage
Operating Supply Current
Power Down Supply
Current
Short Circuit Current
Input Capacitance
Symbol
VDD
V
IH
V
IL
I
IL
I
IH
V
OH
V
OL
IDD
Conditions
Min.
3.0
2
Typ.
Max.
3.6
0.8
Units
V
V
V
µ
A
µ
A
VIN = 0V
VIN = VDD
I
OH
= -12 mA
I
OL
= 12 mA
No Load
CLKIN = 0, Note 1
2.4
50
100
0.4
32
12
±50
5
V
V
mA
µ
A
I
OS
C
IN
Each output
CLKIN
mA
pF
Note 1: When there is no clock signal present at CLKIN, the ICS2305 will enter power down mode. The
PLL is stopped and the outputs are tri-state.
AC Electrical Characteristics
ICS2305M-1
,
VDD=3.3 V ±10%,
Ambient temperature -40 to +85
°
C(Industrial), (0-70
°
C Commercial)
Parameter
Output Clock Frequency
Output Clock Frequency
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
Output Clock Duty Cycle
Device to Device Skew
Output to Output Skew
Input to Output Skew
Cycle to Cycle Jitter
PLL Lock Time
Symbol
f
IN
t
OR
t
OF
t
DC
t
DC
Conditions
10 pF load
30 pF load
0.8 to 2.0 V, outputs loaded
2.0 to 0.8 V, outputs loaded
measured at 1.4V, Fout=66.67
MHz
measured at 1.4V, Fout=50
MHz
rising edges at VDD/2
rising edges at VDD/2
rising edges at VDD/2
measured at 66.67M, outputs
loaded
Note 2
Min.
10
10
Typ.
Max. Units
133
100
2.5
2.5
MHz
MHz
ns
ns
%
%
ps
ps
ps
ps
ms
40
45
50
50
60
55
700
250
±350
200
1.0
Note 2: With VDD at a steady rate and valid input at CLKIN.
MDS 2305 D
In te grated Circuit Systems
●
4
5 25 Race Stree t, San Jose, CA 951 26
●
Revision 022505
te l (40 8) 2 97-12 01
●
www.icst.com
ICS2305
3.3 V
OLT
Z
ERO
D
ELAY
, L
OW
S
KEW
B
UFFER
ICS2305M-1H
,
VDD=3.3 V ±10%,
Ambient temperature -40 to +85
°
C(Industrial), (0-70
°
C Commercial),
Parameter
Output Clock Frequency
Output Clock Frequency
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
Output Clock Duty Cycle
Device to Device Skew
Output to Output Skew
Input to Output Skew
Cycle to Cycle Jitter
PLL Lock Time
Symbol
f
IN
t
OR
t
OF
t
DC
t
DC
Conditions
10 pF load
30 pF load
0.8 to 2.0 V, outputs loaded
2.0 to 0.8 V, outputs loaded
measured at 1.4V, Fout=66.67
MHz
measured at 1.4V, Fout=50
MHz
rising edges at VDD/2
rising edges at VDD/2
rising edges at VDD/2
measured at 66.67M, outputs
loaded
Note 3
Min.
10
10
Typ.
Max. Units
133
100
1.5
1.5
MHz
MHz
ns
ns
%
%
ps
ps
ps
ps
ms
40
45
50
50
60
55
700
250
±350
200
1.0
Note 3: With VDD at a steady rate and valid input at CLKIN
Thermal Characteristics
Parameter
Thermal Resistance Junction to
Ambient
Symbol
θ
JA
θ
JA
θ
JA
θ
JC
Conditions
Still air
1 m/s air flow
3 m/s air flow
Min.
Typ.
120
115
105
58
Max. Units
°C/W
°C/W
°C/W
°C/W
Thermal Resistance Junction to Case
MDS 2305 D
In te grated Circuit Systems
●
5
5 25 Race Stree t, San Jose, CA 951 26
●
Revision 022505
te l (40 8) 2 97-12 01
●
www.icst.com