ee
ead-Fr e
L
g
P a c k a ns
Optio le!
b
Availa
GAL16V8
High Performance E
2
CMOS PLD
Generic Array Logic™
Features
• HIGH PERFORMANCE E
2
CMOS
®
TECHNOLOGY
— 3.5 ns Maximum Propagation Delay
— Fmax = 250 MHz
— 3.0 ns Maximum from Clock Input to Data Output
— UltraMOS
®
Advanced CMOS Technology
• 50% to 75% REDUCTION IN POWER FROM BIPOLAR
— 75mA Typ Icc on Low Power Device
— 45mA Typ Icc on Quarter Power Device
• ACTIVE PULL-UPS ON ALL PINS
2
Functional Block Diagram
I/CLK
CLK
8
I
8
I
OLMC
I/O/Q
OLMC
I/O/Q
A
D LL
IS
C DE
O
VI
N
TI CE
N
S
U
ED
PROGRAMMABLE
AND-ARRAY
(64 X 32)
8
OLMC
I
8
OLMC
I
8
OLMC
I
8
OLMC
I
8
OLMC
I
8
OLMC
I
OE
I/O/Q
• E CELL TECHNOLOGY
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
I/O/Q
• EIGHT OUTPUT LOGIC MACROCELLS
— Maximum Flexibility for Complex Logic Designs
— Programmable Output Polarity
— Also Emulates 20-pin PAL
®
Devices with Full
Function/Fuse Map/Parametric Compatibility
I/O/Q
I/O/Q
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
— 100% Functional Testability
• APPLICATIONS INCLUDE:
— DMA Control
— State Machine Control
— High Speed Graphics Processing
— Standard Logic Speed Upgrade
• LEAD-FREE PACKAGE OPTIONS
I/O/Q
I/O/Q
I/OE
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
Pin Configuration
PLCC
I
I
I/CLK Vcc
20
I/O/Q
2
Description
The GAL16V8, at 3.5 ns maximum propagation delay time, com-
bines a high performance CMOS process with Electrically Eras-
able (E
2
) floating gate technology to provide the highest speed
performance available in the PLD market. High speed erase times
(<100ms) allow the devices to be reprogrammed quickly and ef-
ficiently.
I
4
18
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
DIP
I
GAL16V8
Top View
11
I/CLK
1
20
Vcc
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I
6
16
I
I
I
I
I
I
I
I
I
I
The generic architecture provides maximum design flexibility by
allowing the Output Logic Macrocell (OLMC) to be configured by
the user. An important subset of the many architecture configura-
tions possible with the GAL16V8 are the PAL architectures listed
in the table of the macrocell description section. GAL16V8 devices
are capable of emulating any of these PAL architectures with full
function/fuse map/parametric compatibility.
Unique test circuitry and reprogrammable cells allow complete AC,
DC, and functional testing during manufacture. As a result, Lattice
Semiconductor delivers 100% field programmability and function-
ality of all GAL products. In addition, 100 erase/write cycles and
data retention in excess of 20 years are specified.
8
9
I
14
13
GND
I/OE I/O/Q
I/O/Q
GAL
16V8
5
SOIC
GAL
16V8
Top
View
15
I/CLK
I
I
I
I
I
I
I
I
GND
1
20
Vcc
I/O/Q
I/O/Q
I/O/Q
I/O/Q
5
15
I/O/Q
I/O/Q
I/O/Q
I/O/Q
GND
10
11
I/OE
10
11
I/OE
Copyright © 2006 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
August 2006
16v8_11
1
Specifications
GAL16V8
Lead-Free Packaging
Commercial Grade Specifications
Tpd (ns)
3.5
5
7.5
10
Tsu (ns)
2.5
3
7
10
Tco (ns)
3. 0
4
5
7
Icc (mA)
115
115
115
115
55
55
115
Ordering #
GAL16V8D-3LJN
1
GAL16V8D-5LJN
GAL16V8D-7LPN
GAL16V8D-7LJN
GAL16V8D-10QPN
GAL16V8D-10QJN
GAL16V8D-10LPN
Package
Lead-Free 20-Lead PLCC
Lead-Free 20-Lead PLCC
Lead-Free 20-Pin Plastic DIP
Lead-Free 20-Lead PLCC
Lead-Free 20-Pin Plastic DIP
Lead-Free 20-Lead PLCC
Lead-Free 20-Pin Plastic DIP
1. Discontinued per PCN #06-07. Contact Rochester Electronics for available inventory.
Industrial Grade Specifications
Tpd (ns)
7.5
10
A
D LL
IS
C DE
O
VI
N
TI CE
N
S
U
ED
115
55
55
GAL16V8D-10LJN
Lead-Free 20-Lead PLCC
15
12
10
GAL16V8D-15QPN
GAL16V8D-15QJN
Lead-Free 20-Pin Plastic DIP
Lead-Free 20-Lead PLCC
90
GAL16V8D-15LPN
GAL16V8D-15LJN
Lead-Free 20-Pin Plastic DIP
Lead-Free 20-Lead PLCC
90
25
15
12
55
55
GAL16V8D-25QPN
GAL16V8D-25QJN
Lead-Free 20-Pin Plastic DIP
Lead-Free 20-Lead PLCC
90
GAL16V8D-25LPN
GAL16V8D-25LJN
Lead-Free 20-Pin Plastic DIP
Lead-Free 20-Lead PLCC
90
Tsu (ns)
7
Tco (ns)
5
Icc (mA)
130
Ordering #
Package
GAL16V8D-7LJNI
Lead-Free 20-Lead PLCC
130
GAL16V8D-7LPNI
Lead-Free 20-Pin Plastic DIP
10
7
130
GAL16V8D-10LJNI
Lead-Free 20-Lead PLCC
130
GAL16V8D-10LPNI
Lead-Free 20-Pin Plastic DIP
15
12
10
130
GAL16V8D-15LJNI
Lead-Free 20-Lead PLCC
130
65
65
GAL16V8D-15LPNI
Lead-Free 20-Pin Plastic DIP
20
13
11
GAL16V8D-20QJNI
Lead-Free 20-Lead PLCC
GAL16V8D-20QPNI
Lead-Free 20-Pin Plastic DIP
25
15
12
65
65
GAL16V8D-25QJNI
Lead-Free 20-Lead PLCC
GAL16V8D-25QPNI
GAL16V8D-25LJNI
Lead-Free 20-Pin Plastic DIP
Lead-Free 20-Lead PLCC
130
130
GAL16V8D-25LPNI
Lead-Free 20-Pin Plastic DIP
Part Number Description
XXXXXXXX _ XX
X XX X
GAL16V8D
Device Name
Speed (ns)
Grade
Blank = Commercial
I = Industrial
L = Low Power
Power
Q = Quarter Power
Package
P = Plastic DIP
PN = Lead-free Plastic DIP
J = PLCC
JN = Lead-free PLCC
S = SOIC
3