3 V/5 V CMOS
0.5 Ω SPDT/2:1 Mux in SC70
ADG849
FEATURES
Ultralow on-resistance:
0.5 Ω typical
0.8 Ω maximum at 5 V supply
Excellent audio performance, ultralow distortion:
0.13 Ω typical
0.24 Ω maximum R
ON
flatness
High current carrying capability:
400 mA continuous current
600 mA peak current at 5 V
Automotive temperature range: –40°C to +125°C
Rail-to-rail operation
Typical power consumption (<0.01 µW)
Pin-compatible upgrade for the ADG749 and ADG779
FUNCTIONAL BLOCK DIAGRAM
ADG849
S2
D
S1
IN
SWITCHES SHOWN
FOR A LOGIC 1 INPUT
04737-0-001
Figure 1.
APPLICATIONS
Cellular phones
PDAs
Battery-powered systems
Audio and video signal routing
Modems
PCMCIA cards
Hard drives
Relay replacement
GENERAL DESCRIPTION
The ADG849 is a monolithic, CMOS SPDT (single pole, double
throw) switch that operates with a supply range of 1.8 V to 5.5 V.
It is designed to offer ultralow on-resistance values of typically
0.5 Ω. This design makes the ADG849 an ideal solution for
applications that require minimal distortion through the switch.
The ADG849 also has the capability of carrying large amounts
of current, typically 600 mA at 5 V operation.
Each switch of the ADG849 conducts equally well in both
directions when on. The device exhibits break-before-make
switching action, thus preventing momentary shorting when
switching channels.
The ADG849 is available in a tiny, 6-lead SC70 package, making
it the ideal candidate for space-constrained applications.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
Very low on-resistance, 0.5 Ω typical.
Tiny, 6-lead SC70 package.
Low power dissipation. The CMOS construction ensures
low power dissipation.
High current carrying capability.
Low THD + noise (0.01% typ).
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
ADG849* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
DESIGN RESOURCES
•
ADG849 Material Declaration
•
PCN-PDN Information
•
Quality And Reliability
•
Symbols and Footprints
DOCUMENTATION
Data Sheet
• ADG849: 3 V/5 V CMOS 0.5 Ω SPDT Switch in SC70 Data
Sheet
User Guides
•
UG-252: Evaluation Board for the AD7280A Lithium Ion
Battery Monitoring System
DISCUSSIONS
View all ADG849 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TOOLS AND SIMULATIONS
•
ADG849 SPICE Macro Model
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
REFERENCE DESIGNS
•
CN0197
REFERENCE MATERIALS
Product Selection Guide
•
Switches and Multiplexers Product Selection Guide
Technical Articles
•
CMOS Switches Offer High Performance in Low Power,
Wideband Applications
•
Data-acquisition system uses fault protection
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not
trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
ADG849
TABLE OF CONTENTS
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ..............................................7
Test Circuits........................................................................................9
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 11
REVISION HISTORY
7/04—Revision 0: Initial Version
Rev. 0| Page 2 of 12
ADG849
SPECIFICATIONS
Table 1. V
DD
= 4.5 V to 5.5 V, GND = 0 V
1
Parameter
ANALOG SWITCH
Analog Signal Range
On-Resistance (R
ON
)
On-Resistance Match Between Channels
(∆R
ON
)
On-Resistance Flatness (R
FLAT(ON)
)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off )
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
C
IN
, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
Break-Before-Make Time Delay, t
BBM
+25°C
–40°C to
+85°C
–40°C to
+125°C
0 V to V
DD
0.5
0.6
0.05
0.095
0.13
0.18
±0.01
±0.04
0.11
0.22
0.125
0.24
0.7
0.8
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA typ
Test Conditions/Comments
V
S
= 0 V to V
DD
, I
DS
=
–100
mA
See Figure 15
V
S
= 0.85 V, I
DS
=
–100
mA
V
S
= 0 V to V
DD
, I
DS
=
–100
mA
V
DD
= 5.5 V
V
S
= 4.5 V/1 V, V
D
= 1 V/4.5 V,
see Figure 16
V
S
= V
D
= 1 V, or V
S
= V
D
= 4.5 V,
see Figure 17
2.0
0.8
0.005
±0.1
2.5
11
15
9
13
5
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
dB typ
%
pF typ
pF typ
V
DD
= 5.5 V, Digital Inputs = 0 V or 5.5 V
µA typ
µA max
V
IN
= V
INL
or V
INH
17
14
18
15
R
L
= 50 Ω, C
L
= 35 pF
V
S
= 3 V, see Figure 18
R
L
= 50 Ω, C
L
= 35 pF
V
S
= 3 V, see Figure 18
R
L
= 50 Ω, C
L
= 35 pF, V
S1
= V
S2
= 3 V,
see Figure 19
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF, see Figure 20
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz
see Figure 21
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz,
see Figure 22
R
L
= 50 Ω, C
L
= 5 pF, see Figure 23
R
L
= 50 Ω, C
L
= 5 pF, see Figure 23
R
L
= 32 Ω, f = 20 Hz to 20 kHz,
Vs = 2 V p-p
1
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Bandwidth: –3 dB
Insertion Loss
THD + N
C
S
(Off )
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
50
–64
–64
38
0.04
0.01
52
145
0.001
1.0
1
2
The temperature range for the Y version is –40°C to +125°C.
Guaranteed by design, not subject to production test.
Rev. 0| Page 3 of 12
ADG849
Table 2. V
DD
= 2.7 V to 3.6 V, GND = 0 V
1
Parameter
ANALOG SWITCH
Analog Signal Range
On-Resistance (R
ON
)
On-Resistance Match Between Channels
(∆R
ON
)
On-Resistance Flatness (R
FLAT(ON)
)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off )
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
C
IN
, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
Break-Before-Make Time Delay, t
BBM
+25°C
–40°C to
+85°C
–40°C to
+125°C
0 V to V
DD
0.72
1.1
0.05
0.095
0.3
±0.1
±0.01
0.11
0.125
1.1
1.2
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
nA typ
nA typ
Test Conditions/Comments
V
S
= 0 V to V
DD
, I
DS
= –100 mA
See Figure 15
V
S
= 1.5 V, I
DS
= –100 mA
V
S
= 0 V to V
DD
, I
DS
= –100 mA
V
DD
= 3.6 V
V
S
= 3 V/1 V, V
D
= 1 V/3 V, see Figure 16
V
S
= V
D
= 1 V, or V
S
= V
D
= 3 V;
see Figure 17
2.0
0.8
0.7
0.005
±0.1
2.5
16
22
13
18
7
V min
V max
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
dB typ
%
pF typ
pF typ
V
DD
= 3 V to 3.6 V
V
DD
= 2.7 V
V
IN
= V
INL
or V
INH
24
20
26
22
R
L
= 50 Ω, C
L
= 35 pF
V
S
= 1.5 V, see Figure 18
R
L
= 50 Ω, C
L
= 35 pF
V
S
= 1.5 V, see Figure 18
R
L
= 50 Ω, C
L
= 35 pF, V
S1
= V
S2
= 1.5 V,
see Figure 19
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF, see Figure 20
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz,
see Figure 21
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz,
see Figure 22
R
L
= 50 Ω, C
L
= 5 pF, see Figure 23
R
L
= 50 Ω C
L
= 5 pF, see Figure 23
R
L
= 32 Ω, f = 20 Hz to 20 kHz,
Vs = 1 V p-p
f = 1 MHz
f = 1 MHz
V
DD
= 3.6 V
Digital Inputs = 0 V or 3.6 V
1
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Bandwidth: –3 dB
Insertion Loss
THD + N
C
S
(Off )
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
30
–64
–64
38
0.04
0.02
55
147
0.001
1.0
µA typ
µA max
1
2
The temperature range for the Y version is –40°C to +125°C.
Guaranteed by design, not subject to production test.
Rev. 0| Page 4 of 12
京公网安备 11010802033920号
EEWORLD
