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V 2.4
2017-09-06
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Control Integrated POwer System (CIPOS™)
IKCM20L60HD
Table of contents
Table of contents ................................................................................................................................................... 2
CIPOS™ Control Integrated POwer System ............................................................................................................ 3
System Configuration .................................................................................................................................................. 3
ITRIP (Over current detection function, Pin 15).......................................................................................................... 6
VDD, VSS (Low side control supply and reference, Pin 13, 16) ................................................................................... 6
VB(U, V, W) and VS(U, V, W) (High side supplies, Pin 1 - 6) .......................................................................................... 6
NW, NV, NU (Low side emitter, Pin 17 - 19) ................................................................................................................. 6
W, V, U (High side emitter and low side collector, Pin 20 - 22) ................................................................................... 6
P (Positive bus input voltage, Pin 23) .......................................................................................................................... 6
Absolute Maximum Ratings ................................................................................................................................... 7
Control Section ............................................................................................................................................................ 7
Mechanical Characteristics and Ratings .............................................................................................................. 11
Switching Times Definition .................................................................................................................................. 11
Circuit of a Typical Application ............................................................................................................................ 12
Revision history ................................................................................................................................................... 15
Datasheet
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2017-09-06
Control Integrated POwer System (CIPOS™)
IKCM20L60HD
CIPOS™
Control Integrated POwer System
Dual In-Line Intelligent Power Module
3Φ -bridge 600V / 20A
Features
Fully isolated Dual In-Line molded module
TRENCHSTOP™ IGBTs
Rugged SOI gate driver technology with stability
against transient and negative voltage
Allowable negative VS potential up to -11V for
signal transmission at VBS=15V
Integrated bootstrap functionality
Over current shutdown
Under-voltage lockout at all channels
Low side emitter pins accessible for all phase
current monitoring (open emitter)
Cross-conduction prevention
All of 6 switches turn off during protection
Lead-free terminal plating; RoHS compliant
Very low thermal resistance due to DCB
Description
The CIPOS™ module family offers the chance for
integrating various power and control components
to increase reliability, optimize PCB size and system
costs.
It is designed to control three phase AC motors and
permanent magnet motors in variable speed drives
for applications like an air conditioning, a
refrigerator and a washing machine. The package
concept is specially adapted to power applications,
which need good thermal conduction and electrical
isolation, but also EMI-save control and overload
protection.
TRENCHSTOP™ IGBTs and anti parallel diodes are
combined with an optimized SOI gate driver for
excellent electrical performance.
Target Applications
Home appliances
Low power motor drives
System Configuration
3 half bridges with TRENCHSTOP™ IGBTs and
anti parallel diodes
3Φ SOI gate driver
Pin-to-heatsink clearance distance typ. 1.6mm
Datasheet
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Control Integrated POwer System (CIPOS™)
IKCM20L60HD
Pin Configuration
Bottom View
(24) NC
(1) VS(U)
(2) VB(U)
(23) P
(3) VS(V)
(4) VB(V)
(22) U
(5) VS(W)
(6) VB(W)
(7) HIN(U)
(8) HIN(V)
(9) HIN(W)
(10) LIN(U)
(11) LIN(V)
(12) LIN(W)
(13) VDD
(14) VFO
(15) ITRIP
(16) VSS
(21) V
(20) W
(19) NU
(18) NV
(17) NW
Figure 1
Pin configuration
Internal Electrical Schematic
NC (24)
P (23)
(1) VS(U)
(2) VB(U)
VB1
RBS1
HO1
VS1
U (22)
(3) VS(V)
(4) VB(V)
VB2
RBS2
HO2
VS2
V (21)
(5) VS(W)
(6) VB(W)
VB3
RBS3
HO3
VS3
W (20)
(7) HIN(U)
(8) HIN(V)
(9) HIN(W)
(10) LIN(U)
(11) LIN(V)
(12) LIN(W)
(13) VDD
(14) VFO
(15) ITRIP
(16) VSS
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
VDD
VFO
ITRIP
VSS
LO1
NU (19)
LO2
NV (18)
LO3
NW (17)
Figure 2
Datasheet
Internal schematic
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Control Integrated POwer System (CIPOS™)
IKCM20L60HD
Pin Assignment
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Pin Name
VS(U)
VB(U)
VS(V)
VB(V)
VS(W)
VB(W)
HIN(U)
HIN(V)
HIN(W)
LIN(U)
LIN(V)
LIN(W)
VDD
VFO
ITRIP
VSS
NW
NV
NU
W
V
U
P
NC
Pin Description
U-phase high side floating IC supply offset voltage
U-phase high side floating IC supply voltage
V-phase high side floating IC supply offset voltage
V-phase high side floating IC supply voltage
W-phase high side floating IC supply offset voltage
W-phase high side floating IC supply voltage
U-phase high side gate driver input
V-phase high side gate driver input
W-phase high side gate driver input
U-phase low side gate driver input
V-phase low side gate driver input
W-phase low side gate driver input
Low side control supply
Fault output
Over current shutdown input
Low side control negative supply
W-phase low side emitter
V-phase low side emitter
U-phase low side emitter
Motor W-phase output
Motor V-phase output
Motor U-phase output
Positive bus input voltage
No Connection
Pin Description
HIN(U, V, W) and LIN(U, V, W) (Low side and high
side control pins, Pin 7 - 12)
These pins are positive logic and they are
responsible for the control of the integrated IGBT.
The Schmitt-trigger input thresholds of them are
such to guarantee LSTTL and CMOS compatibility
down to 3.3V controller outputs. Pull-down resistor
of about 5k is internally provided to pre-bias
inputs during supply start-up and a zener clamp is
provided for pin protection purposes. Input
Schmitt-trigger and noise filter provide beneficial
noise rejection to short input pulses.
The noise filter suppresses control pulses which are
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