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DSPIC33EP128MC504-I-PT

Description
Multilayer Ceramic Capacitors MLCC - SMD/SMT 100uF 16V X5R +/-20% 1210 HiCV
Categorysemiconductor    The embedded processor and controller   
File Size4MB,511 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
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DSPIC33EP128MC504-I-PT Overview

Multilayer Ceramic Capacitors MLCC - SMD/SMT 100uF 16V X5R +/-20% 1210 HiCV

DSPIC33EP128MC504-I-PT Parametric

Parameter NameAttribute value
Product CategoryDigital Signal Processors & Controllers - DSP, DSC
ManufacturerMicrochip
RoHSDetails
Mounting StyleSMD/SMT
Package / CaseTQFP-44
ProductDSCs
CoredsPIC33EP
Maximum Clock Frequency7.37 MHz, 32 kHz
Program Memory Size128 kB
Data RAM Size16 kB
Operating Supply Voltage3 V to 3.6 V
Maximum Operating Temperature+ 85 C
PackagingTray
Data Bus Width16 bit
Interface TypeCAN, I2C, SPI, UART
Minimum Operating Temperature- 40 C
Moisture SensitiveYes
Number of I/Os35 I/O
Number of Timers/Counters5 Timer
Processor SeriesdsPIC33E
Program Memory TypeFlash
Factory Pack Quantity160
Unit Weight0.239369 oz
dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X, and
PIC24EPXXXGP/MC20X
16-bit Microcontrollers and Digital Signal Controllers (up to 512 KB Flash
and 48 KB SRAM) with High-Speed PWM, Op amps, and Advanced Analog
Operating Conditions
• 3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS
3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS
Timers/Output Compare/Input Capture
• 12 general purpose timers:
- Five 16-bit and up to two 32-bit timers/counters
- Four OC modules configurable as timers/counters
- PTG module with two configurable timers/counters
- 32-bit Quadrature Encoder Interface (QEI) module
configurable as a timer/counter
• Four IC modules
• Peripheral Pin Select (PPS) to allow function remap
• Peripheral Trigger Generator (PTG) for scheduling
complex sequences
Core: 16-bit dsPIC33E/PIC24E CPU
Code-efficient (C and Assembly) architecture
Two 40-bit wide accumulators
Single-cycle (MAC/MPY) with dual data fetch
Single-cycle mixed-sign MUL plus hardware divide
32-bit multiply support
0.9% internal oscillator
Programmable PLLs and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer (WDT)
Fast wake-up and start-up
Low-power management modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
0.6 mA/MHz dynamic current (typical)
30 µA I
PD
current (typical)
Clock Management
Communication Interfaces
• Two UART modules (17.5 Mbps)
- With support for LIN 2.0 protocols and IrDA
®
• Two 4-wire SPI modules (15 Mbps)
• ECAN™ module (1 Mbaud) CAN 2.0B support
• Two I
2
C™ modules (up to 1 Mbaud) with SMBus
support
• PPS to allow function remap
• Programmable Cyclic Redundancy Check (CRC)
Power Management
Direct Memory Access (DMA)
• 4-channel DMA with user-selectable priority arbitration
• UART, SPI, ADC, ECAN, IC, OC, and Timers
High-Speed PWM
Up to three PWM pairs with independent timing
Dead time for rising and falling edges
7.14 ns PWM resolution
PWM support for:
- DC/DC, AC/DC, Inverters, PFC, Lighting
- BLDC, PMSM, ACIM, SRM
• Programmable Fault inputs
• Flexible trigger configurations for ADC conversions
Input/Output
• Sink/Source 15 mA or 10 mA, pin-specific for
standard VOH/VOL, up to 22 or 14 mA, respectively
for non-standard VOH1
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• Up to 5 mA overvoltage clamp current
• External interrupts on all I/O pins
Advanced Analog Features
• ADC module:
- Configurable as 10-bit, 1.1 Msps with four S&H or
12-bit, 500 ksps with one S&H
- Six analog inputs on 28-pin devices and up to 16
analog inputs on 64-pin devices
• Flexible and independent ADC trigger sources
• Up to three Op amp/Comparators with direct connection
to the ADC module:
- Additional dedicated comparator
- Programmable references with 32 voltage points
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
- On-chip temperature measurement
Qualification and Class B Support
• AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) planned
• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC) planned
• Class B Safety Library, IEC 60730
Debugger Development Support
In-circuit and in-application programming
Two program and two complex data breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
Trace and run-time watch
Packages
Type
SPDIP
SOIC
SSOP
Pin Count
28
28
28
I/O Pins
21
21
21
Contact Lead/Pitch
.100''
1.27
0.65
Dimensions
1.365x.240x.120'' 17.9x7.50x2.05 10.50x7.80x2
Note:
All dimensions are in millimeters (mm) unless specified.
QFN-S
28
21
0.65
6x6x0.9
QFN
44
64
35
53
0.65
0.50
8x8x0.9 9x9x.9
VTLA
36
25
44
35
44
35
TQFP
64
53
0.50
5x5x0.5 6x6x0.5
0.50
10x10x1
2011-2012 Microchip Technology Inc.
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