Preliminary Technical Data
FEATURES
Fast throughput rate: 1.5 MSPS
Specified for V
DD
of 2.7 V to 5.25 V
Low power
8 mW max at 1.5 MSPS with 3 V supplies
16 mW max at 1.5 MSPS with 5 V supplies
8 analog input channels with a sequencer
Software configurable analog inputs
8-channel single-ended inputs
4-channel fully differential inputs
4-channel pseudo-differential inputs
7-channel pseudo-differential inputs
Accurate on-chip 2.5 V reference
Wide input bandwidth
70 dB SNR at 50 kHz input frequency
No pipeline delays
High speed parallel interface—word/byte modes
Full shutdown mode: 1 µA max
32-lead LFCSP and TQFP package
8-Channel, 1.5 MSPS, 12-Bit and 10-Bit
Parallel ADCs with a Sequencer
AD7938/AD7939
FUNCTIONAL BLOCK DIAGRAM
V
DD
V
REFIN/
AGND
AD7938/AD7939
2.5V
VREF
12-/10-BIT
SAR ADC
AND
CONTROL
CLKIN
CONVST
BUSY
V
REFOUT
V
IN
0
I/P
MUX
V
IN
7
T/H
SEQUENCER
PARALLEL INTERFACE/CONTROL REGISTER
V
DRIVE
DB0 DB11
CS RD WR W/B
DGND
Figure 1.
GENERAL DESCRIPTION
The AD7938/AD7939 are 12-bit and 10-bit, high speed, low
power, successive approximation (SAR) ADCs. The parts
operate from a single 2.7 V to 5.25 V power supply and feature
throughput rates up to 1.5 MSPS. The parts contain a low noise,
wide bandwidth, differential track-and-hold amplifier that can
handle input frequencies up to 20 MHz.
The AD7938/AD7939 feature eight analog input channels with
a channel sequencer that allow a preprogrammed selection of
channels to be converted sequentially. These parts can operate
with either single-ended, fully differential, or pseudo-
differential analog inputs.
The conversion process and data acquisition are controlled
using standard control inputs that allow easy interfacing with
microprocessors and DSPs. The input signal is sampled on the
falling edge of CONVST and the conversion is also initiated at
this point.
The AD7938/AD7939 have an accurate on-chip 2.5 V reference
that can be used as the reference source for the analog-to-digital
conversion. Alternatively, this pin can be overdriven to provide
an external reference.
These parts use advanced design techniques to achieve very low
power dissipation at high throughput rates. They also feature
flexible power management options. An on-chip control register
allows the user to set up different operating conditions,
including analog input range and configuration, output coding,
power management, and channel sequencing.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
High throughput with low power consumption.
Eight analog inputs with a channel sequencer.
Accurate on-chip 2.5 V reference.
Software configurable analog inputs. Single-ended, pseudo-
differential, or fully differential analog inputs that are
software selectable.
Single-supply operation with V
DRIVE
function. The V
DRIVE
function allows the parallel interface to connect directly to
3 V, or 5 V processor systems independent of V
DD
.
No pipeline delay.
Accurate control of the sampling instant via a CONVST
input and once off conversion control.
5.
6.
7.
Rev.
PrN
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
03715-0-001
AD7938/AD7939
TABLE OF CONTENTS
AD7938—Specifications.................................................................. 3
AD7939—Specifications.................................................................. 5
Timing Specifications....................................................................... 7
Absolute Maximum Ratings............................................................ 8
ESD Caution.................................................................................. 8
Pin Function Description ................................................................ 9
Terminology .................................................................................... 11
Typical Performance Characteristics ........................................... 13
On-Chip Registers .......................................................................... 16
Circuit Information ........................................................................ 18
Converter Operation.................................................................. 18
ADC Transfer Function............................................................. 18
Typical Connection Diagram ................................................... 19
Analog Input Structure.............................................................. 19
Preliminary Technical Data
Analog Inputs.............................................................................. 20
Analog Input Selection .............................................................. 22
Reference Section ....................................................................... 23
Parallel Interface......................................................................... 25
Power Modes of Operation....................................................... 28
Power vs. Throughput Rate....................................................... 29
Microprocessor Interfacing....................................................... 29
Application Hints ........................................................................... 31
Grounding and Layout .............................................................. 31
PCB Design Guidelines for Chip Scale Package .................... 31
Evaluating the AD7938/AD7939 Performance ...................... 31
Outline Dimensions ....................................................................... 32
Ordering Guide .......................................................................... 32
REVISION HISTORY
8/04—Revision PrN: Preliminary Version
Rev. PrN | Page 2 of 32
Preliminary Technical Data
AD7938—SPECIFICATIONS
AD7938/AD7939
V
DD
= V
DRIVE
= 2.7 V to 5.25 V, Internal/External V
REF
= 2.5 V, unless otherwise noted, F
CLKIN
= 24 MHz, F
SAMPLE
= 1.5 MSPS; T
A
= T
MIN
to
T
MAX
, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
Signal-to-Noise + Distortion (SINAD)
2
Signal-to-Noise Ratio (SNR)
2
Total Harmonic Distortion (THD)
2
Peak Harmonic or Spurious Noise (SFDR)
2
Intermodulation Distortion (IMD)
2
Second-Order Terms
Third-Order Terms
Channel to Channel Isolation
Aperture Delay
2
Aperture Jitter
2
Full Power Bandwidth
2, 3
DC ACCURACY
Resolution
Integral Nonlinearity
2
Differential Nonlinearity
2
Total Unadjusted Error
Single-Ended and Pseudo-Differential Input
Offset Error
2
Offset Error Match
2
Gain Error
2
Gain Error Match
2
Fully Differential Input
Positive Gain Error
2
Positive Gain Error Match
2
Zero-Code Error
2
Zero-Code Error Match
2
Negative Gain Error
2
Negative Gain Error Match
2
ANALOG INPUT
Single-Ended Input Range
Pseudo-Differential Input Range: V
IN+
V
IN−
Fully Differential Input Range: V
IN+
and V
IN−
V
IN+
and V
IN−
5
DC Leakage Current
Input Capacitance
REFERENCE INPUT/OUTPUT
V
REF
Input Voltage
6
DC Leakage Current
V
REF
Input Impedance
V
REFOUT
Output Voltage
V
REFOUT
Temperature Coefficient
V
REF
Noise
B Version
1
70
70
−75
−75
−85
−85
−85
5
50
20
2.5
12
±1
±0.95
TBD
±4.5
±0.5
±2
±0.6
±2
±0.6
±3
±1
±2
±0.6
0 to V
REF
or 0 to 2 × V
REF
0 to V
REF
or 2 × V
REF
−0.1 to +0.4
V
CM
± V
REF
/2
V
CM
± V
REF
±1
45
10
2.5
±1
10
2.5
15
10
130
Unit
dB min
dB min
dB max
dB max
dB typ
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
Twos complement output coding
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
V
V
V
V
V
µA max
pF typ
pF typ
V
µA max
kΩ typ
V
ppm/°C typ
µV typ
µV typ
Rev. PrN | Page 3 of 32
Test Conditions/Comments
F
IN
= 50 kHz sine wave
−80 dB typ
−82 dB typ
fa = 40.1 kHz, fb = 51.5 kHz
@ 3 dB
@ 0.1 dB
Guaranteed no missed codes to 12 bits
Straight binary output coding
Depending on RANGE bit setting
Depending on RANGE bit setting
V
CM
= common-mode voltage
4
= V
REF
/2
V
CM
= V
REF
, V
IN+
or V
IN−
must remain within GND/V
DD
When in track
When in hold
±1% for specified performance
±0.1% @ 25°C
0.1 Hz to 10 Hz bandwidth
0.1 Hz to 1 MHz bandwidth
AD7938/AD7939
Parameter
V
REF
Output Impedance
V
REF
Input Capacitance
LOGIC INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN5
LOGIC OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output Capacitance
5
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time
Throughput Rate
POWER REQUIREMENTS
V
DD
V
DRIVE
I
DD7
Normal Mode(Static)
Normal Mode (Operational)
Auto-Standby Mode
Auto-Shutdown Mode
Full Shutdown Mode
Power Dissipation
Normal Mode (Operational)
Auto-Standby Mode (Static)
Auto-Shutdown Mode (Static)
Full Shutdown Mode
B Version
1
10
15
25
2.4
0.8
±1
10
2.4
0.4
±10
10
Straight (Natural) Binary
Twos Complement
t
2
+ 13 t
clk
+ t
20
135
1.5
2.7/5.25
2.7/5.25
0.5
3.2
2.6
1.55
90
1
1
1
16
8
450
270
5
3
5/3
Unit
Ω typ
pF typ
pF typ
V min
V max
µA max
pF max
V min
V max
µA max
pF max
Preliminary Technical Data
Test Conditions/Comments
When in track
When in hold
Typically 10 nA, V
IN
= 0 V or V
DRIVE
I
SOURCE
= 200 µA
I
SINK
= 200 µA
CODING bit = 0
CODING bit = 1
ns
ns max
MSPS max
V min/max
V min/max
mA typ
mA max
mA max
mA typ
µA max
mA typ
µA max
µA max
mW max
mW max
µW max
µW max
µW max
µW max
µW max
Digital I/Ps = 0 V or V
DRIVE
V
DD
= 2.7 V to 5.25 V, SCLK on or off
V
DD
= 4.75 V to 5.25 V
V
DD
= 2.7 V to 3.6 V
F
SAMPLE
= 250 kSPS
(Static)
F
SAMPLE
= 250 kSPS
(Static)
SCLK on or off
V
DD
= 5 V
V
DD
= 3 V
V
DD
= 5 V
V
DD
= 3 V
V
DD
= 5 V
V
DD
= 3 V
V
DD
= 5 V/3 V
Full-scale step input
1
2
Temperature ranges as follows: B Versions: −40°C to +85°C.
See the Terminology section.
3
Analog inputs with slew rates exceeding 27 V/µs (full-scale input sine wave > 3.5 MHz) within the acquisition time may cause an incorrect result to be returned by the
converter.
4
For full common-mode range see Figure 28 and Figure 29.
5
Sample tested during initial release to ensure compliance.
6
This device is operational with an external reference in the range 0.1 V to 3.5 V in differential mode and 0.1 V to V
DD
in pseudo-differential and single-ended modes.
See the Reference Section for more information.
7
Measured with a midscale dc input.
Rev. PrN | Page 4 of 32
Preliminary Technical Data
AD7939—SPECIFICATIONS
AD7938/AD7939
V
DD
= V
DRIVE
= 2.7 V to 5.25 V, Internal/External V
REF
= 2.5V, unless otherwise noted, F
CLKIN
= 24 MHz, F
SAMPLE
= 1.5 MSPS; T
A
= T
MIN
to
T
MAX
, unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
Signal-to-Noise + Distortion (SINAD)
2
Signal-to-Noise Ratio (SNR)
2
Total Harmonic Distortion (THD)
2
Peak Harmonic or Spurious Noise (SFDR)
2
Intermodulation Distortion (IMD)
2
Second-Order Terms
Third-Order Terms
Channel to Channel Isolation
Aperture Delay
2
Aperture Jitter
2
Full Power Bandwidth
2, 3
DC ACCURACY
Resolution
Integral Nonlinearity
2
Differential Nonlinearity
2
Total Unadjusted Error
Single-Ended and Pseudo-Differential Input
Offset Error
2
Offset Error Match
2
Gain Error
2
Gain Error Match
2
Fully Differential Input
Positive Gain Error
2
Positive Gain Error Match
2
Zero-Code Error
2
Zero-Code Error Match
2
Negative Gain Error
2
Negative Gain Error Match
2
ANALOG INPUT
Single-Ended Input Range
Pseudo-Differential Input Range: V
IN+
V
IN−
Fully Differential Input Range: V
IN+
and V
IN−
V
IN+
and V
IN−
5
DC Leakage Current
Input Capacitance
REFERENCE INPUT/OUTPUT
V
REF
Input Voltage
6
DC Leakage Current
5
V
REF
Input Impedance
V
REFOUT
Output Voltage
V
REFOUT
Temperature Coefficient
V
REF
Noise
B Version
1
60
60
−73
−73
−75
−75
−75
5
50
20
2.5
10
±0.5
±0.5
TBD
±4.5
±0.5
±2
±0.6
±2
±0.6
±3
±1
±2
±0.6
0 to V
REF
or 0 to 2 × V
REF
0 to V
REF
or 2 × V
REF
−0.1 to +0.4
V
CM
± V
REF
/2
V
CM
± V
REF
±1
45
10
2.5
±1
10
2.5
15
10
130
Unit
dB min
dB min
dB max
dB max
fa = 40.1 kHz, fb = 51.5 kHz
dB typ
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
Twos complement output coding
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
V
V
V
V
V
µA max
pF typ
pF typ
V
µA max
kΩ
V
ppm/°C typ
µV typ
µV typ
Rev. PrN | Page 5 of 32
Test Conditions/Comments
F
IN
= 50 kHz sine wave
@ 3 dB
@ 0.1 dB
Guaranteed no missed codes to 10 bits
Straight binary output coding
Depending on RANGE bit setting
Depending on RANGE bit setting
V
CM
= common-mode voltage
4
= V
REF
/2
V
CM
= V
REF
, V
IN+
or V
IN−
must remain within GND/V
DD
When in track
When in hold
±1% for specified performance
±0.1% @ 25°C
0.1 Hz to 10 Hz bandwidth
0.1 Hz to 1 MHz bandwidth
DSP and ARM Processors
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