Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(T
A
= -40°C to +85°C.) (Note 1)
PARAMETER
IO PIN: GENERAL DATA
1-Wire Pullup Voltage
1-Wire Pullup Resistance
Input Capacitance
Input Load Current
High-to-Low Switching Threshold
Input Low Voltage
Low-to-High Switching Threshold
Switching Hysteresis
Output Low Voltage
Recovery Time
(Notes 2,12)
Rising-Edge Hold-Off Time
(Notes 5, 13)
Time Slot Duration
(Notes 2, 14)
V
PUP
R
PUP
C
IO
I
L
V
TL
V
IL
V
TH
V
HY
V
OL
t
REC
t
REH
t
SLOT
(Note 2)
(Notes 2, 3)
(Notes 4, 5)
IO pin at V
PUP
(Notes 5, 6, 7)
(Notes 2, 8)
(Notes 5, 6, 9)
(Notes 5, 6, 10)
At 4mA current load (Note 11)
Standard speed, R
PUP
= 2.2k
Overdrive speed, R
PUP
= 2.2k
Standard speed
Overdrive speed
Standard speed
Overdrive speed
Standard speed
Overdrive speed
Standard speed
Overdrive speed
Standard speed
Overdrive speed
Standard speed
Overdrive speed
5
5
0.5
65
11
480
48
15
2
60
8
60
6
640
80
60
6
240
24
75
10
5.0
Not applicable (0)
1.0
0.21
0.05
0.46
2.8
0.3
5.25
2.2
1000
6.7
V
PUP
-
1.8
0.5
V
PUP
-
1.1
1.70
0.4
V
k
pF
μA
V
V
V
V
V
μs
μs
μs
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
IO PIN: 1-Wire RESET, PRESENCE-DETECT CYCLE
Reset Low Time (Note 2)
Presence-Detect High Time
Presence-Detect Low Time
Presence-Detect Sample Time
(Notes 2, 15)
t
RSTL
t
PDH
t
PDL
t
MSP
μs
μs
μs
μs
2
Maxim Integrated
ABRIDGED DATA SHEET
DS28E01-100
1Kb Protected 1-Wire EEPROM
with SHA-1 Engine
ELECTRICAL CHARACTERISTICS (continued)
(T
A
= -40°C to +85°C.) (Note 1)
PARAMETER
IO PIN: 1-Wire WRITE
Standard speed
Write-Zero Low Time
(Notes 2, 16, 17)
Write-One Low Time
(Notes 2, 17)
IO PIN: 1-Wire READ
Read Low Time
(Notes 2, 18)
Read Sample Time
(Notes 2, 18)
EEPROM
Programming Current
Programming Time
Write/Erase Cycles (Endurance)
(Notes 21, 22)
Data Retention
(Notes 23, 24, 25)
SHA-1 ENGINE
Computation Current
Computation Time
(Notes 5, 26)
I
LCSHA
t
CSHA
mA
I
PROG
t
PROG
N
CY
t
DR
(Notes 5, 19)
(Note 20)
At +25°C
At +85°C (worst case)
At +85°C (worst case)
200k
50k
40
Years
0.8
10
mA
ms
t
RL
t
MSR
Standard speed
Overdrive speed
Standard speed
Overdrive speed
5
1
t
RL
+
t
RL
+
15 -
2-
15
2
μs
μs
t
W0L
Overdrive speed, V
PUP
> 4.5V
Overdrive speed
Standard speed
Overdrive speed
60
5
6
1
1
120
15.5
15.5
15
2
μs
μs
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
t
W1L
Refer to the full data sheet.
ms
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Note 16:
Limits are 100% production tested at T
A
= +25°C and/or T
A
= +85°C. Limits over the operating temperature range and
relevant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed.
System requirement.
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times.
The specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For more
heavily loaded systems, an active pullup such as that found in the DS2482-x00, DS2480B, or DS2490 may be required.
Maximum value represents the internal parasite capacitance when V
PUP
is first applied. Once the parasite capacitance is
charged, it does not affect normal communication.
Guaranteed by design, characterization, and/or simulation only. Not production tested.
V
TL
, V
TH
, and V
HY
are a function of the internal supply voltage, which is a function of V
PUP
, R
PUP
, 1-Wire timing, and
capacitive loading on IO. Lower V
PUP
, higher R
PUP
, shorter t
REC
, and heavier capacitive loading all lead to lower values of
V
TL
, V
TH
, and V
HY
.
Voltage below which, during a falling edge on IO, a logic 0 is detected.
The voltage on IO must be less than or equal to V
ILMAX
at all times the master is driving IO to a logic 0 level.
Voltage above which, during a rising edge on IO, a logic 1 is detected.
After V
TH
is crossed during a rising edge on IO, the voltage on IO must drop by at least V
HY
to be detected as logic 0.
The I-V characteristic is linear for voltages less than 1V.
Applies to a single device attached to a 1-Wire line.
The earliest recognition of a negative edge is possible at t
REH
after V
TH
has been reached on the preceding rising edge.
Defines maximum possible bit rate. Equal to 1/(t
W0LMIN
+ t
RECMIN
).
Interval after t
RSTL
during which a bus master can read a logic 0 on IO if there is a DS28E01-100 present. The first presence
pulse after power-up could be outside this interval, but will be complete within 2ms after power-up.
Numbers in
bold
are
not
in compliance with legacy 1-Wire product standards. See the
Comparison Table.
Maxim Integrated
3
ABRIDGED DATA SHEET
DS28E01-100
1Kb Protected 1-Wire EEPROM
with SHA-1 Engine
ELECTRICAL CHARACTERISTICS (continued)
(T
A
= -40°C to +85°C.) (Note 1)
Note 17:
ε
in Figure 12 represents the time required for the pullup circuitry to pull the voltage on IO up from V
IL
to V
TH
. The actual
maximum duration for the master to pull the line low is t
W1LMAX
+ t
F
-
ε
and t
W0LMAX
+ t
F
-
ε,
respectively.
Note 18:
δ
in Figure 12 represents the time required for the pullup circuitry to pull the voltage on IO up from V
IL
to the input-high
threshold of the bus master. The actual maximum duration for the master to pull the line low is t
RLMAX
+ t
F
.
Note 19:
Current drawn from IO during the EEPROM programming interval or SHA-1 computation.
Note 20:
Refer to the full data sheet for this note.
Note 21:
Note 22:
Note 23:
Note 24:
Write-cycle endurance is degraded as T
A
increases.
Not 100% production tested; guaranteed by reliability monitor sampling.
Data retention is degraded as T
A
increases.
Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to the
data sheet limit at operating temperature range is established by reliability testing.
Note 25:
EEPROM writes can become nonfunctional after the data-retention time is exceeded. Long-term storage at elevated tem-
peratures is not recommended; the device can lose its write capability after 10 years at +125°C or 40 years at +85°C.
Note 26:
Refer to the full data sheet for this note.
COMPARISON TABLE
LEGACY VALUES
PARAMETER
STANDARD SPEED
(μs)
MIN
t
SLOT
(including t
REC
)
t
RSTL
t
PDH
t
PDL
t
W0L
61
480
15
60
60
MAX
(undefined)
(undefined)
60
240
120
OVERDRIVE SPEED
(μs)
MIN
7
48
2
8
6
MAX
(undefined)
80
6
24
16
DS28E01-100 VALUES
STANDARD SPEED
(μs)
MIN
65*
480
15
60
60
MAX
(undefined)
640
60
240
120
OVERDRIVE SPEED
(μs)
MIN
11*
48
2
8
6
MAX
(undefined)
80
6
24
15.5
*Intentional
change; longer recovery time requirement due to modified 1-Wire front-end.
Note:
Numbers in
bold
are
not
in compliance with legacy 1-Wire product standards.
4
Maxim Integrated
ABRIDGED DATA SHEET
DS28E01-100
1Kb Protected 1-Wire EEPROM
with SHA-1 Engine
Pin Description
PIN
TSOC
1
2
3, 4, 5, 6
—
TDFN-EP
3
2
1, 4, 5, 6
—
SFN
2
1
—
—
TO-92
1
3
2
—
NAME
GND
IO
N.C.
EP
Ground Reference
1-Wire Bus Interface. Open-drain signal that requires an external
pullup resistor.
Not Connected
Exposed Pad (TDFN Only). Solder evenly to the board’s ground
plane for proper operation. Refer to Application Note 3273:
Exposed Pads: A Brief Introduction
for additional information.
FUNCTION
Detailed Description
The DS28E01-100 combines 1024 bits of EEPROM
organized as four 256-bit pages, a 64-bit secret, a reg-
ister page, a 512-bit SHA-1 engine, and a 64-bit ROM
registration number in a single chip. Data is transferred
serially through the 1-Wire protocol, which requires only
a single data lead and a ground return. The DS28E01-
100 has an additional memory area called the scratch-
pad that acts as a buffer when writing to the memory,
the register page, or when installing a new secret. Data
is first written to the scratchpad from where it can be
read back. After the data has been verified, a Copy
Scratchpad command transfers the data to its final
memory location, provided that the DS28E01-100
receives a matching 160-bit MAC. The computation of
the MAC involves the secret and additional data stored
in the DS28E01-100 including the device’s registration
number. Only a new secret can be loaded without pro-
viding a MAC. The SHA-1 engine is also activated to
compute 160-bit MACs when performing an authenti-
cated read of a memory page and when computing a
new secret, instead of loading it. The DS28E01-100
understands a unique command “Refresh Scratchpad.”
Proper use of a refresh sequence after a Copy
Scratchpad operation reduces the number of weak bit
failures if the device is used in a touch environment
(see the
Writing with Verification
section). The refresh
sequence also provides a means to restore functionali-
ty in a device with bits in a weak state.
The device’s 64-bit ROM registration number guaran-
tees unique identification and is used to address the
device in a multidrop 1-Wire network environment,
where multiple devices reside on a common 1-Wire bus
and operate independently of each other. Applications
of the DS28E01-100 include printer cartridge configura-
tion and monitoring, medical sensor authentication and
calibration, and system intellectual property protection.
Overview
The block diagram in Figure 1 shows the relationships
between the major control and memory sections of the
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