PCA9633
4-bit Fm+ I
2
C-bus LED driver
Rev. 05 — 25 July 2008
Product data sheet
1. General description
The PCA9633 is an I
2
C-bus controlled 4-bit LED driver optimized for
Red/Green/Blue/Amber (RGBA) color mixing applications. Each LED output has its own
8-bit resolution (256 steps) fixed frequency Individual PWM controller that operates at
97 kHz with a duty cycle that is adjustable from 0 % to 99.6 % to allow the LED to be set
to a specific brightness value. A fifth 8-bit resolution (256 steps) Group PWM controller
has both a fixed frequency of 190 Hz and an adjustable frequency between 24 Hz to once
every 10.73 seconds with a duty cycle that is adjustable from 0 % to 99.6 % that is used to
either dim or blink all LEDs with the same value.
Each LED output can be off, on (no PWM control), set at its Individual PWM controller
value or at both Individual and Group PWM controller values. The LED output driver is
programmed to be either open-drain with a 25 mA current sink capability at 5 V or totem
pole with a 25 mA sink, 10 mA source capability at 5 V. The PCA9633 operates with a
supply voltage range of 2.3 V to 5.5 V and the outputs are 5.5 V tolerant. LEDs can be
directly connected to the LED output (up to 25 mA, 5.5 V) or controlled with external
drivers and a minimum amount of discrete components for larger current or higher voltage
LEDs.
The PCA9633 is one of the first LED controller devices in a new Fast-mode Plus (Fm+)
family. Fm+ devices offer higher frequency (up to 1 MHz) and more densely populated bus
operation (up to 4000 pF).
The active LOW Output Enable input pin (OE) allows asynchronous control of the LED
outputs and can be used to set all the outputs to a defined I
2
C-bus programmable logic
state. The OE can also be used to externally PWM the outputs, which is useful when
multiple devices need to be dimmed or blinked together using software control. This
feature is available for the 16-pin version only.
Software programmable LED Group and three Sub Call I
2
C addresses allow all or defined
groups of PCA9633 devices to respond to a common I
2
C address, allowing for example,
all red LEDs to be turned on or off at the same time or marquee chasing effect, thus
minimizing I
2
C-bus commands.
The PCA9633 is offered with 3 different I
2
C-bus address options: fixed I
2
C-bus address
(8-pin version), 4 different I
2
C-bus addresses from 2 programmable address pins (10-pin
version), and 126 different I
2
C-bus addresses from 7 programmable address pins (16-pin
version). They are software identical except for the different number of address
combinations.
The Software Reset (SWRST) Call allows the master to perform a reset of the PCA9633
through the I
2
C-bus, identical to the Power-On Reset (POR) that initializes the registers to
their default state causing the outputs to be set HIGH (LED off). This allows an easy and
quick way to reconfigure all device registers to the same condition.
NXP Semiconductors
PCA9633
4-bit Fm+ I
2
C-bus LED driver
2. Features
I
4 LED drivers. Each output programmable at:
N
Off
N
On
N
Programmable LED brightness
N
Programmable group dimming/blinking mixed with individual LED brightness
I
1 MHz Fast-mode Plus I
2
C-bus interface with 30 mA high drive capability on SDA
output for driving high capacitive buses
I
256-step (8-bit) linear programmable brightness per LED output varying from fully off
(default) to maximum brightness using a 97 kHz PWM signal
I
256-step group brightness control allows general dimming (using a 190 Hz PWM
signal) from fully off to maximum brightness (default)
I
256-step group blinking with frequency programmable from 24 Hz to 10.73 s and
duty cycle from 0 % to 99.6 %
I
Four totem pole outputs (sink 25 mA and source 10 mA at 5 V) with software
programmable open-drain LED outputs selection (default at totem pole). No input
function.
I
Output state change programmable on the Acknowledge or the STOP Command to
update outputs byte-by-byte or all at the same time (default to ‘Change on STOP’).
I
Active LOW Output Enable (OE) input pin. LED outputs programmable to ‘1’, ‘0’ or
‘high-impedance’ (default at power-up) when OE is HIGH, thus allowing hardware
blinking and dimming of the LEDs (16-pin version only).
I
2 hardware address pins (10-pin version) and 7 hardware address pins (16-pin
version) allow respectively up to 4 and 126 devices to be connected to the same
I
2
C-bus. No hardware address pins in the 8-pin version.
I
4 software programmable I
2
C-bus addresses (one LED Group Call address and three
LED Sub Call addresses) allow groups of devices to be addressed at the same time in
any combination (for example, one register used for ‘All Call’ so that all the PCA9633s
on the I
2
C-bus can be addressed at the same time and the second register used for
three different addresses so that
1
⁄
3
of all devices on the bus can be addressed at the
same time in a group). Software enable and disable for I
2
C-bus address.
I
Software Reset feature (SWRST Call) allows the device to be reset through the
I
2
C-bus
I
25 MHz internal oscillator requires no external components
I
Internal power-on reset
I
Noise filter on SDA/SCL inputs
I
Edge rate control on outputs
I
No glitch on power-up
I
Supports hot insertion
I
Low standby current
I
Operating power supply voltage range of 2.3 V to 5.5 V
I
5.5 V tolerant inputs
I
−40 °C
to +85
°C
operation
I
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
I
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
PCA9633_5
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 25 July 2008
2 of 43
NXP Semiconductors
PCA9633
4-bit Fm+ I
2
C-bus LED driver
I
Packages offered: SO, TSSOP (MSOP), HVQFN, HVSON
3. Applications
I
I
I
I
I
RGB or RGBA LED drivers
LED status information
LED displays
LCD backlights
Keypad backlights for cellular phones or handheld devices
4. Ordering information
Table 1.
Ordering information
Topside
mark
PCA9633
9633
9633
PCA9633
9633
9633
Package
Name
SO16
TSSOP8
TSSOP10
TSSOP16
HVQFN16
HVSON8
Description
plastic small outline package; 16 leads; body width 3.9 mm
plastic thin shrink small outline package; 8 leads;
body width 3 mm
plastic thin shrink small outline package; 10 leads;
body width 3 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
Version
SOT109-1
SOT505-1
SOT552-1
SOT403-1
Type number
PCA9633D16
PCA9633DP1
PCA9633DP2
PCA9633PW
PCA9633BS
PCA9633TK
plastic thermal enhanced very thin quad flat package; no leads; SOT629-1
16 terminals; body 4
×
4
×
0.85 mm
plastic thermal enhanced very thin small outline package;
no leads; 8 terminals; body 3
×
3
×
0.85 mm
SOT908-1
PCA9633_5
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 25 July 2008
3 of 43
NXP Semiconductors
PCA9633
4-bit Fm+ I
2
C-bus LED driver
5. Block diagram
16-pin version
10-pin version
A0
A1
A2
A3
A4
A5
A6
PCA9633
SCL
SDA
I
2
C-BUS
CONTROL
V
DD
V
SS
LED
STATE
SELECT
REGISTER
PWM
REGISTER X
BRIGHTNESS
CONTROL
POWER-ON
RESET
INPUT FILTER
V
DD
LEDn
97 kHz
25 MHz
OSCILLATOR
24.3 kHz
GRPFREQ
REGISTER
MUX/
CONTROL
GRPPWM
REGISTER
'0' – permanently OFF
'1' – permanently ON
190 Hz
OE
(16-pin
version
only)
002aab283
Fig 1.
Block diagram of PCA9633
PCA9633_5
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 25 July 2008
4 of 43
NXP Semiconductors
PCA9633
4-bit Fm+ I
2
C-bus LED driver
6. Pinning information
6.1 Pinning
LED0
LED1
LED2
LED3
1
2
3
4
002aab314
8
7
V
DD
SDA
SCL
V
SS
LED0
LED1
LED2
LED3
A0
1
2
3
4
5
002aab315
10 V
DD
9
SDA
SCL
A1
V
SS
PCA9633DP1
PCA9633DP2
8
7
6
6
5
Fig 2.
Pin configuration for TSSOP8
Fig 3.
Pin configuration for TSSOP10
A0
A1
A0
A1
LED0
LED1
LED2
LED3
A2
A3
1
2
3
4
5
6
7
8
002aab316
1
2
3
4
16 V
DD
15 A6
14 A5
13 SDA
16 V
DD
15 A6
14 A5
13 SDA
12 SCL
11 A4
10 OE
9
V
SS
LED0
LED1
LED2
LED3
A2
A3
PCA9633D16
5
6
7
8
002aab313
12 SCL
11 A4
10 OE
9
V
SS
PCA9633PW
Fig 4.
Pin configuration for TSSOP16
14 V
DD
16 A1
15 A0
13 A6
Fig 5.
Pin configuration for SO16
terminal 1
index area
terminal 1
index area
12 A5
LED0
11 SDA
1
2
8
7
V
DD
SDA
SCL
V
SS
LED0
LED1
LED2
LED3
1
2
PCA9633BS
3
4
5
6
7
8
10 SCL
9
A4
LED1
LED2
LED3
PCA9633TK
3
4
6
5
V
SS
A2
A3
OE
002aab317
002aab807
Transparent top view
Transparent top view
Fig 6.
Pin configuration for HVQFN16
Fig 7.
Pin configuration for HVSON8
PCA9633_5
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 25 July 2008
5 of 43
京公网安备 11010802033920号
EEWORLD
