Data Sheet
FEATURES
16-Bit, 1.5 LSB INL, 250 kSPS PulSAR
Differential ADC in MSOP
AD7687
TYPICAL APPLICATION CIRCUIT
0.5V TO 5V
2.5 TO 5V
16-bit resolution with no missing codes
Throughput: 250 kSPS
INL: ±0.4 LSB typ, ±1.5 LSB max (±23 ppm of FSR)
Dynamic range: 96.5 dB
SNR: 95.5 dB at 20 kHz
THD: −118 dB at 20 kHz
True differential analog input range
±V
REF
0 V to V
REF
with V
REF
up to VDD on both inputs
No pipeline delay
Single-supply 2.3 V to 5.5 V operation with
1.8 V/2.5 V/3 V/5 V logic interface
Proprietary serial interface: SPI/QSPI™/MICROWIRE/DSP
compatible
Daisy-chain multiple ADCs and BUSY indicator
Power dissipation
1.35 mW at 2.5 V/100 kSPS, 4 mW at 5 V/100 kSPS, and
1.4 μW at 2.5 V/100 SPS
Standby current: 1 nA
10-lead MSOP and 10-lead, 3 mm × 3 mm LFCSP
Pin-for-pin compatible with
AD7685, AD7686,
and
AD7688
VREF
0
IN+
IN–
VREF
0
REF VDD VIO
SDI
1.8V TO VDD
3- OR 4-WIRE INTERFACE
(SPI, DAISY CHAIN, CS)
AD7687
GND
SCK
SDO
CNV
Figure 1.
APPLICATIONS
Battery-powered equipment
Data acquisitions
Instrumentation
Medical instruments
Process controls
GENERAL DESCRIPTION
The
AD7687
1
is a 16-bit, charge redistribution, successive
approximation, analog-to-digital converter (ADC) that operates
from a single power supply, VDD, between 2.3 V to 5.5 V. It
contains a low power, high speed, 16-bit sampling ADC with no
missing codes, an internal conversion clock, and a versatile
serial interface port. The device also contains a low noise, wide
bandwidth, short aperture delay track-and-hold circuit. On the
CNV rising edge, the
AD7687
the samples the voltage difference
between IN+ and IN− pins, which can range from −V
REF
to +V
REF
.
The reference voltage, V
REF
, is applied externally and can be set
up to the supply voltage.
The power consumption of the device scales linearly with
throughput.
The SPI-compatible serial interface also features the ability to
daisy-chain several ADCs on a single 3-wire bus and provides
an optional BUSY indicator by means of the SDI pin. It is
compatible with 1.8 V, 2.5 V, 3 V, or 5 V logic using the separate
supply VIO.
The
AD7687
comes in a 10-lead MSOP or a 10-lead LFCSP
with operation specified from −40°C to +85°C.
Table 1. MSOP, LFCSP/SOT-23 16-Bit PulSAR
®
ADC
Type
True Differential
Pseudo
Differential/Unipolar
Unipolar
100 kSPS
AD7684
AD7683
AD7680
250 kSPS
AD7687
AD7685
AD7694
500 kSPS
AD7688
AD7686
1
Protected by U.S. Patent 6,703,961.
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Rev. E
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02972-002
AD7687* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
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EVALUATION KITS
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REFERENCE DESIGNS
•
CN0225
REFERENCE MATERIALS
DOCUMENTATION
Application Notes
•
AN-931: Understanding PulSAR ADC Support Circuitry
•
AN-932: Power Supply Sequencing
Data Sheet
•
AD7687: 16-Bit, 1.5 LSB INL, 250 kSPS PulSAR Differential
ADC in MSOP Data Sheet
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User Guides
•
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•
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Technical Articles
•
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•
MS-2210: Designing Power Supplies for High Speed ADC
Tutorials
•
MT-074: Differential Drivers for Precision ADCs
DESIGN RESOURCES
•
AD7687 Material Declaration
•
PCN-PDN Information
•
Quality And Reliability
•
Symbols and Footprints
DISCUSSIONS
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SAMPLE AND BUY
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SOFTWARE AND SYSTEMS REQUIREMENTS
•
AD7687 FMC-SDP Interposer & Evaluation Board / Xilinx
KC705 Reference Design
•
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AD7687
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Typical Application Circuit ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 3
Specifications..................................................................................... 4
Timing Specifications .................................................................. 6
Absolute Maximum Ratings............................................................ 8
Thermal Resistance ...................................................................... 8
ESD Caution .................................................................................. 8
Pin Configurations and Function Descriptions ........................... 9
Terminology .................................................................................... 10
Typical Performance Characteristics ........................................... 11
Theory of Operation ...................................................................... 14
Circuit Information .................................................................... 14
Converter Operation .................................................................. 14
Typical Connection Diagram ................................................... 15
Analog Input ............................................................................... 16
Data Sheet
Driver Amplifier Choice ........................................................... 17
Single-to-Differential Driver .................................................... 17
Voltage Reference Input ............................................................ 17
Power Supply............................................................................... 17
Supplying the ADC from the Reference.................................. 18
Digital Interface .......................................................................... 18
CS Mode, 3-Wire Without BUSY Indicator ........................... 19
CS Mode, 3-Wire with BUSY Indicator .................................. 20
CS Mode, 4-Wire Without BUSY Indicator ........................... 21
CS Mode, 4-Wire with BUSY Indicator .................................. 22
Chain Mode Without BUSY Indicator .................................... 23
Chain Mode with BUSY Indicator ........................................... 24
Applications Information .............................................................. 25
Layout .......................................................................................... 25
Evaluating the Performance of the AD7687............................... 25
Outline Dimensions ....................................................................... 26
Ordering Guide .......................................................................... 26
Rev. E | Page 2 of 26
Data Sheet
REVISION HISTORY
12/15—Rev. D to Rev. E
Deleted Figure 1; Renumbered Sequentially ................................. 1
Changes to Features Section and General Description Section ....... 1
Change to Signal-to-(Noise + Distortion) Parameter, Table 2 ......... 4
Added Timing Diagrams Section.................................................... 7
Moved Figure 2 and Figure 3 ........................................................... 7
Changes to Table 8 ............................................................................ 9
Changes to Figure 7 Caption, Figure 8 Caption, Figure 10
Caption, and Figure 11 Caption ....................................................11
Added Theory of Operation Section ............................................14
Changes to Analog Input Section .................................................16
Changes to Drive Amplifier Choice Section, Table 10, Figure 30,
Voltage Reference Input Section, and Power Supply Section .........17
Changes to Supplying the ADC from the Reference Section
and Digital Interface Section .........................................................18
Changed CS Mode, 3-Wire, No BUSY Indicator Section to CS
Mode, 3-Wire Without BUSY Indicator Section ........................19
Changes to CS Mode, 3-Wire Without BUSY Indicator Section ...19
Changes to CS Mode, 3-Wire with BUSY Indicator Section ......20
Changed CS Mode, 4-Wire, No BUSY Indicator Section to CS
Mode, 4-Wire Without BUSY Indicator Section ........................21
Changes to CS Mode, 4-Wire Without BUSY Indicator Section ... 21
Changes to CS Mode, 4-Wire with BUSY Indicator Section..........22
Changed Chain Mode, No BUSY Indicator Section to Chain
Mode Without BUSY Indicator Section .......................................23
Changes to Chain Mode Without BUSY Indicator Section,
Figure 42 Caption, and Figure 43 Caption...................................23
Changes to Chain Mode with BUSY Indicator Section .............24
Changes to Layout Section .............................................................25
Changed Application Hints Section to Application
Recommendations Section ............................................................25
Changes to Ordering Guide ...........................................................26
AD7687
4/15—Rev. C to Rev. D
Added Patent Note, Note 1 .............................................................. 1
Changes to SNR Degradation Equation, Driver Amplifier
Choice Section ................................................................................. 16
Changes to Ordering Guide ........................................................... 26
7/14—Rev. B to Rev. C
Deleted QFN ...................................................................Throughout
Changed Application Diagram Section to Typical Application
Circuit Section ................................................................................... 1
Change to Features Section.............................................................. 1
Added Note 1 ..................................................................................... 1
Changes to Figure 27 ...................................................................... 14
Changes to Evaluating the Performance of the AD7687
Section .............................................................................................. 24
Updated Outline Dimensions........................................................ 25
Changes to Ordering Guide ........................................................... 26
8/11—Rev. A to Rev. B
Changes to Table 7 ............................................................................ 7
Changes to Ordering Guide ........................................................... 26
2/11—Rev. 0 to Rev. A
Deleted QFN in Development Note ............................Throughout
Changes to Table 6 ............................................................................ 7
Added Thermal Resistance Section and Table 7 ........................... 7
Changes to Figure 6 and Table 8 ..................................................... 8
Updated Outline Dimensions........................................................ 25
Changes to Ordering Guide ........................................................... 26
4/05—Revision 0: Initial Version
Rev. E | Page 3 of 26
AD7687
SPECIFICATIONS
VDD = 2.3 V to 5.5 V, VIO = 2.3 V to VDD, V
REF
= VDD, T
A
= −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
RESOLUTION
ANALOG INPUT
Voltage Range
Absolute Input Voltage
Common-Mode Input Range
Analog Input CMRR
Leakage Current at 25°C
Input Impedance
ACCURACY
No Missing Codes
Differential Linearity Error
Integral Linearity Error
Transition Noise
Gain Error
2
, T
MIN
to T
MAX
Gain Error Temperature Drift
Offset Error
2
, T
MIN
to T
MAX
Offset Temperature Drift
Power Supply Sensitivity
THROUGHPUT
Conversion Rate
Transient Response
AC ACCURACY
Dynamic Range
Signal-to-Noise Ratio
Spurious-Free Dynamic Range
Total Harmonic Distortion
Signal-to-(Noise + Distortion) Ratio
Test Conditions/Comments
Min
16
−V
REF
−0.1
0
Typ
Max
Data Sheet
Unit
Bits
V
V
V
dB
nA
IN+ − IN−
IN+ and IN−
IN+ and IN−
f
IN
= 250 kHz
Acquisition phase
V
REF
/2
65
1
See the Analog Input section
+V
REF
V
REF
+ 0.1
V
REF
/2 + 0.1
16
−1
−1.5
REF = VDD = 5 V
VDD = 4.5 V to 5.5 V
VDD = 2.3 V to 4.5 V
VDD = 5 V
±
5%
VDD = 4.5 V to 5.5 V
VDD = 2.3 V to 4.5 V
Full-scale step
V
REF
= 5 V
f
IN
= 20 kHz, V
REF
= 5 V
f
IN
= 20 kHz, V
REF
= 2.5 V
f
IN
= 20 kHz
f
IN
= 20 kHz
f
IN
= 20 kHz, V
REF
= 5 V
f
IN
= 20 kHz, V
REF
= 5 V, −60 dB input
f
IN
= 20 kHz, V
REF
= 2.5 V
0
0
±0.4
±0.4
0.35
±2
±0.3
±0.1
±0.7
±0.3
±0.05
+1
+1.5
±6
±1.6
±3.5
Bits
LSB
1
LSB
LSB
LSB
ppm/°C
mV
mV
ppm/°C
LSB
kSPS
kSPS
µs
dB
3
dB
dB
dB
dB
dB
dB
dB
dB
250
200
1.8
96.5
95.5
92.5
−118
−118
95
36.5
92.5
115
95.8
94
92
94
92
Intermodulation Distortion
4
1
2
LSB means least significant bit. With the ±5 V input range, one LSB is 152.6 µV.
See the Terminology section. These specifications do include full temperature range variation but do not include the error contribution from the external reference.
3
All specifications in dB are referred to a full-scale input FSR. Tested with an input signal at 0.5 dB below full-scale, unless otherwise specified.
4
f
IN1
= 21.4 kHz, f
IN2
= 18.9 kHz, each tone at −7 dB below full-scale.
Rev. E | Page 4 of 26
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