Changes to Figure 9 ...................................................................9
Change to Terminology Section ..............................................12
Changes to Figure 26 ...............................................................14
Changes to Table 9...................................................................15
Change to Single-Ended to Differential Driver Section Title... 16
Changes to Figure 32............................................................... 17
Changes to Figure 34............................................................... 18
Changes to Ordering Guide..................................................... 23
7/2014—Rev. 0 to Rev. A
Changes to Features Section ...................................................... 1
Changes to Table 1..................................................................... 1
Changes to Table 8................................................................... 15
1/2014—Revision 0: Initial Version
Rev. B | Page 2 of 24
Data Sheet
SPECIFICATIONS
VDD = 2.5 V, VIO = 1.71 V to 5.5 V, V
REF
= 5 V, T
A
= −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
RESOLUTION
ANALOG INPUT
Voltage Range
Absolute Input Voltage
Common-Mode Input Range
Analog Input Common Mode Rejection
Ratio (CMRR)
Leakage Current at 25°C
Input Impedance
ACCURACY
No Missing Codes
Differential Nonlinearity Error (DNL)
Integral Nonlinearity Error (INL)
Transition Noise
Gain Error, T
MIN
to T
MAX2
Gain Error Temperature Drift
Zero Error, T
MIN
to T
MAX2
Zero Temperature Drift
Power Supply Rejection Ratio (PSRR)
THROUGHPUT
AD7989-1
Conversion Rate
AD7989-5
Conversion Rate
Transient Response
AC ACCURACY
Dynamic Range
Oversampled Dynamic Range
4
Signal-to-Noise Ratio (SNR)
Spurious-Free Dynamic Range (SFDR)
Total Harmonic Distortion
5
(THD)
Signal-to-Noise-and-Distortion Ratio (SINAD)
1
2
AD7989-1/AD7989-5
Test Conditions/Comments
Min
18
−V
REF
−0.1
V
REF
× 0.475
Typ
Max
Unit
Bits
V
V
V
dB
nA
IN+ − IN−
IN+ and IN−
IN+ and IN−
f
IN
= 450 kHz
Acquisition phase
V
REF
× 0.5
67
+V
REF
V
REF
+ 0.1
V
REF
× 0.525
200
See the Analog Inputs section
18
−0.85
−2
V
REF
= 5 V
−0.023
VDD = 2.5 V ± 5%
0
0
Full-scale step
V
REF
= 5 V
V
REF
= 2.5 V
f
O
= 1 kSPS
f
IN
= 1 kHz, V
REF
= 5 V
f
IN
= 1 kHz, V
REF
= 2.5 V
f
IN
= 10 kHz
f
IN
= 10 kHz
f
IN
= 1 kHz, V
REF
= 5 V
97
±0.5
±1
1.05
+0.004
±1
±100
0.5
90
+1.5
+2
+0.023
+700
Bits
LSB
LSB
LSB
1
% of FS
ppm/°C
μV
ppm/°C
dB
kSPS
kSPS
ns
dB
3
dB
3
dB
3
dB
3
dB
3
dB
3
dB
3
dB
3
100
500
400
99
93
126
98
92.5
−115
−120
97
95.5
LSB means least significant bit. With the ±5 V input range, 1 LSB is 38.15 μV.
See the Terminology section. These specifications include full temperature range variation but not the error contribution from the external reference.
3
All specifications expressed in decibels are referred to a full-scale input range (FSR) and tested with an input signal at 0.5 dB below full scale, unless otherwise specified.
4
Dynamic range is obtained by oversampling the ADC running at a throughput, f
S
, of 500 kSPS followed by postdigital filtering with an output word rate of f
O
.
5
Tested fully in production at f
IN
= 1 kHz.
Rev. B | Page 3 of 24
AD7989-1/AD7989-5
VDD = 2.5 V, VIO = 1.71 V to 5.5 V, V
REF
= 5 V, T
A
= −40°C to +85°C, unless otherwise noted.
Table 3.
Parameter
REFERENCE
Voltage Range
Load Current
SAMPLING DYNAMICS
−3 dB Input Bandwidth
Aperture Delay
DIGITAL INPUTS
Logic Levels
V
IL
V
IH
I
IL
I
IH
DIGITAL OUTPUTS
Data Format
Pipeline Delay
V
OL
V
OH
POWER SUPPLIES
VDD
VIO
Standby Current
1, 2
AD7989-1
Power Dissipation
Total
VDD Only
REF Only
VIO Only
AD7989-5
Power Dissipation
Total
VDD Only
REF Only
VIO Only
Energy per Conversion
TEMPERATURE RANGE
Specified Performance
1
2
Data Sheet
Test Conditions/Comments
Min
2.4
Typ
Max
5.1
Unit
V
μA
MHz
ns
V
REF
= 5 V
250
10
2
VDD = 2.5 V
VIO > 3 V
VIO ≤ 3 V
VIO > 3 V
VIO ≤ 3 V
–0.3
–0.3
0.7 × VIO
0.9 × VIO
−1
−1
+0.3 × VIO
+0.1 × VIO
VIO + 0.3
VIO + 0.3
+1
+1
V
V
V
V
μA
μA
I
SINK
= +500 μA
I
SOURCE
= −500 μA
Serial, 18 bits, twos complement
Conversion results available immediately
after completed conversion
0.4
VIO − 0.3
2.375
1.71
2.5
0.35
70
700
400
170
130
3.5
2
0.85
0.65
7.0
−40
86
860
2.625
5.5
V
V
V
V
μA
μW
μW
μW
μW
μW
mW
mW
mW
mW
nJ/sample
°C
VDD and VIO = 2.5 V, 25°C
VDD = 2.625 V, V
REF
= 5 V, VIO = 3 V
10 kSPS throughput
100 kSPS throughput
VDD = 2.625 V, V
REF
= 5 V, VIO = 3 V
500 kSPS throughput
4.3
T
MIN
to T
MAX
+85
With all digital inputs forced to VIO or ground as required.
During acquisition phase.
Rev. B | Page 4 of 24
Data Sheet
TIMING SPECIFICATIONS
VDD = 2.37 V to 2.63 V, VIO = 2.3 V to 5.5 V, T
A
= −40°C to +85°C, unless otherwise noted.
1
Table 4.
Parameter
THROUGHPUT RATE
AD7989-1
AD7989-5
CONVERSION AND ACQUISITION TIMES
Conversion Time: CNV Rising Edge to Data Available
AD7989-1
AD7989-5
Acquisition Time
AD7989-1
AD7989-5
Time Between Conversions
AD7989-1
AD7989-5
CNV PULSE WIDTH (CS MODE)
SCK
SCK Period (CS Mode)
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
SCK Period (Chain Mode)
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
SCK Low Time
SCK High Time
SCK Falling Edge to Data Remains Valid
SCK Falling Edge to Data Valid Delay
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
CS MODE
CNV or SDI Low to SDO D17 MSB Valid
VIO Above 3 V
VIO Above 2.3V
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode)
SDI Valid Setup Time from CNV Rising Edge (CS Mode)
SDI Valid Hold Time from CNV Rising Edge (CS Mode)
Qorvo's 30 years of foundry services production experience helps drive market change and promote defense and small business innovationHaving a foundry in the United States is critical to the U.S. Depa...
[i=s]This post was last edited by alan000345 on 2020-7-7 21:45[/i]Application processHow to register?National University Electronic Design Competition Training Network New Member Registration
1. Log i...
/***********************************************************Function name: LCD_write_byteFunctionfunction: Simulate SPI interface timing to write data/command LCDEntryparameter: data: data to be writt...
The voice module I am going to test uses a 5V power supply, but the only VCC pin on the development board is connected to a DC power socket, which is used to power the development board, see the figur...
In the circuit of DC-DC power converter, the commonly used field effect tube models are FQP16N50, FHP18N50 and FQP18N50. Among them, the one we will introduce today is FHP18N50, which is a relatively ...
In the design of front-end sampling in power systems, op amps are indispensable. This article mainly discusses the requirements for op amps in power systems and how to choose appropriate op amps.
The ...
RF/Wirelessly
京公网安备 11010802033920号
EEWORLD
