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HD74LVCZ240AT

Description
LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, TTP-20DA
Categorylogic    logic   
File Size98KB,9 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric View All

HD74LVCZ240AT Overview

LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, TTP-20DA

HD74LVCZ240AT Parametric

Parameter NameAttribute value
MakerRenesas Electronics Corporation
Parts packaging codeSOIC
package instructionTTP-20DA
Contacts20
Reach Compliance Codecompliant
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G20
length6.5 mm
Logic integrated circuit typeBUS DRIVER
Number of digits4
Number of functions2
Number of ports2
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityINVERTED
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)7.5 ns
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
width4.4 mm
Base Number Matches1
HD74LVCZ240A
Octal Buffers / Line Drivers with 3–state Outputs
REJ03D0370–0300Z
(Previous ADE-205-229A (Z))
Rev.3.00
Jul. 30, 2004
Description
The HD74LVCZ240A has eight inverter drivers with three state outputs in a 20 pin package. This device is an
inverting buffer and has two active low enables (1G and 2G). Each enable independently controls four buffers.
When V
CC
is between 0 and 1.5 V, the device is in the high impedance state during power up or power down.
Low voltage and high-speed operation is suitable at battery drive product (note type personal computer) and low power
consumption extends the life of a battery for long time operation.
Features
V
CC
= 2.7 to 5.5 V
All inputs V
IH
(Max) = 5.5 V (@V
CC
= 0 to 5.5 V)
All outputs V
O
(Max) = 5.5 V (@V
CC
= 0 V or output off state)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25°C)
High impedance state during power up and power down
Power off disables outputs, permitting live insertion
High output current ±24 mA (@V
CC
= 3.0 to 5.5 V)
Ordering Information
Package Type
SOP–20 pin (JEITA)
TSSOP–20 pin
Package Code
FP–20DAV
TTP–20DAV
Package
Abbreviation
FP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
Part Name
HD74LVCZ240AFPEL
HD74LVCZ240ATELL
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
G
H
L
L
H: High level
L: Low level
X: Immaterial
Z: High impedance
A
X
H
L
Output
Y
Z
L
H
Rev.3.00 Jul. 30, 2004 page 1 of 8
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