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74AUP1G132GS

Among 5 related components, 74AUP1G132GS have related pdf.
Part Number Manufacturer Description Datasheet
74AUP1G132GS NXP AUP/ULP/V SERIES, 2-INPUT NAND GATE, PDSO6, 1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6 Download
74AUP1G132GS Nexperia NAND Gate, AUP/ULP/V Series, 1-Func, 2-Input, CMOS, PDSO6 Download
74AUP1G132GS132 NXP Logic Gates NAND 4.6 V 20 mA Download
74AUP1G132GS,132 Nexperia IC GATE NAND SCHMITT 1CH 6XSON Download
74AUP1G132GS,132 NXP 74AUP1G132 - Low-power 2-input NAND Schmitt trigger Download
74AUP1G132GS parameters:

Description

NAND Gate, AUP/ULP/V Series, 1-Func, 2-Input, CMOS, PDSO6

Parametric
Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNexperia
package instructionVSON,
Reach Compliance Codecompliant
seriesAUP/ULP/V
JESD-30 codeS-PDSO-N6
JESD-609 codee3
length1 mm
Logic integrated circuit typeNAND GATE
Humidity sensitivity level1
Number of functions1
Number of entries2
Number of terminals6
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeVSON
Package shapeSQUARE
Package formSMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)27.9 ns
Certification statusNot Qualified
Maximum seat height0.35 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)0.8 V
Nominal supply voltage (Vsup)1.1 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin (Sn)
Terminal formNO LEAD
Terminal pitch0.35 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width1 mm
Base Number Matches1

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