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MMBT4401LT1

Description
Transistor
CategoryThe transistor   
File Size35KB,1 Pages
ManufacturerJCET
Websitehttp://www.cj-elec.com/

Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); ​​QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

 

 

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MMBT4401LT1 Overview

Transistor

MMBT4401LT1 Parametric

Parameter NameAttribute value
MakerJCET
package instruction,
Reach Compliance Codeunknown
Is SamacsysN
Maximum collector current (IC)0.6 A
ConfigurationSingle
Minimum DC current gain (hFE)40
Maximum operating temperature150 °C
Polarity/channel typeNPN
Maximum power dissipation(Abs)0.3 W
surface mountYES
Nominal transition frequency (fT)250 MHz
Base Number Matches1

MMBT4401LT1 Preview

Download Datasheet
JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
SOT-23 Plastic-Encapsulate Transistors
SOT-23
MMBT4401LT1
TRANSISTOR (NPN)
1. BASE
2. EMITTER
3. COLLECTOR
T
J
, T
stg
: -55℃ to +150℃
0. 95
Unit: mm
ELECTRICAL CHARACTERISTICS (Tamb=25℃
Parameter
Collector-base breakdown voltage
Collector-emitter breakdown voltage
Emitter-base breakdown voltage
Collector cut-off current
Collector cut-off current
Emitter cut-off current
unless otherwise specified)
Symbol
V
(BR)CBO
V
(BR)CEO
V
(BR)EBO
I
CBO
I
CEO
I
EBO
H
FE(1)
Test
conditions
MIN
60
40
6
0.1
0.1
0.1
100
40
0.4
0.95
250
V
V
MHz
300
MAX
UNIT
V
V
V
µA
µA
µA
Ic=100µA , I
E
=0
I
C
= 1mA , I
B
=0
I
E
=100µA, I
C
=0
V
CB
=50V, I
E
=0
V
CE
=35V, I
B
=0
V
EB
=5V, I
C
=0
V
CE
=1V, I
C
= 150mA
V
CE
=2V, I
C
= 500mA
I
C
=150 mA, I
B
=15mA
I
C
= 150 mA, I
B
=15mA
V
CE
= 10V, I
C
= 20mA
DC current gain
H
FE(2)
Collector-emitter saturation voltage
Base-emitter saturation voltage
Transition frequency
V
CE(sat)
V
BE(sat)
f
T
f =
100MHz
DEVICE MARKING
:MMBT4401LT1=2X
0. 4
FEATURES
Power dissipation
0.3
W (Tamb=25℃)
P
CM:
Collector current
0.6
A
I
CM:
Collector-base voltage
60
V
V
(BR)CBO
:
Operating and storage junction temperature range
1. 0
2. 4
1. 3
2. 9
1. 9
0. 95
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