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KSA2690R

Description
Transistor
CategoryDiscrete semiconductor    The transistor   
File Size135KB,1 Pages
ManufacturerJCET
Websitehttp://www.cj-elec.com/

Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); ​​QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

 

 

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KSA2690R Overview

Transistor

KSA2690R Parametric

Parameter NameAttribute value
MakerJCET
package instructionFLANGE MOUNT, R-PSFM-T3
Reach Compliance Codeunknown
Maximum collector current (IC)1.2 A
Collector-based maximum capacity19 pF
Collector-emitter maximum voltage120 V
ConfigurationSINGLE
Minimum DC current gain (hFE)100
JEDEC-95 codeTO-126
JESD-30 codeR-PSFM-T3
Number of components1
Number of terminals3
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formFLANGE MOUNT
Polarity/channel typeNPN
Maximum power consumption environment1.25 W
Maximum power dissipation(Abs)20 W
surface mountNO
Terminal formTHROUGH-HOLE
Terminal locationSINGLE
transistor applicationsAMPLIFIER
Transistor component materialsSILICON
Nominal transition frequency (fT)155 MHz
VCEsat-Max0.7 V

KSA2690R Preview

JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
TO-126 Plastic-Encapsulate Transistors
KSC2690/2690A
TRANSISTOR (NPN)
TO-126
FEATURES
Audio Frequency Power Amplifier
High Frequency Power Amplifier
Complement to KSA1220/KSA1220A
1. EMITTER
2. COLLECTOR
3. BASE
MAXIMUM RATINGS (T
a
=25℃ unless otherwise noted)
Symbol
V
CBO
Collector-Base Voltage
Collector-Emitter Voltage
Emitter-Base Voltage
Collector Current (DC)
Collector Current ( PW
≤10ms,Duty
Cycle
≤2
% )
Base Current
Collector Power Dissipation (T
a
= 25
℃)
Collector Power Dissipation (T
c
= 25
℃)
T
J
T
stg
Junction Temperature
Storage Temperature
Parameter
KSA2690
KSA2690A
V
CEO
KSA2690
KSA2690A
V
EBO
I
C
I
CP
I
B
P
C
Value
120
160
120
160
5
1.2
2.5
0.3
1.25
20
150
-55-150
Unit
V
V
V
V
V
A
A
A
W
W
ELECTRICAL CHARACTERISTICS (T
a
=25℃ unless otherwise specified)
Parameter
Collector cut-off current
Emitter cut-off current
DC current gain
Collector-emitter saturation voltage
Base-emitter saturation voltage
Transition frequency
Collector output capacitance
(1)
Symbol
I
CBO
I
EBO
h
FE(1)
h
FE(2)
V
CE(sat)
V
BE(sat)
f
T
C
ob
Test
conditions
Min
Typ
Max
1
1
Unit
μA
μA
V
CB
=120V, I
E
=0
V
EB
=3 V, I
C
=0
V
CE
=5V, I
C
=5mA
V
CE
=5V, I
C
=300mA
I
C
=1 A, I
B
=200mA
(1)
I
C
=1 A, I
B
=200mA
(1)
V
CE
=5V, I
C
=200mA
V
CB
=10V, I
E
=0, f=1MHz
35
60
105
140
0.4
1
155
19
320
0.7
1.3
V
V
MHz
pF
Pulse Test : PW
≤350
us , Duty Cycle
2 %
h
FE(2)
R
60-120
CLASSIFICATION OF
Rank
Range
O
100-200
Y
160-320
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