CM2730
300mA D
UAL
L
OW
N
OISE
CMOS LDO
GENERAL DESCRIPTION
The CM2730 dual LDO family are positive linear voltage
regulators developed utilizing CMOS technology. CM2730
contains two LDOs, one with pre-set output voltage (master
LDO1), the other with adjustable output voltage (slave LDO2).
Each LDO owns its input voltage, bandgap reference voltage,
and protection circuit, which reduce noise and cross talk
between two LDOs. This dual LDO family is featured low
quiescent current (60µA typ.), low dropout voltage, and high
output voltage accuracy. Built-in low on-resistance transistor
provides low dropout voltage and large output current. 2.2µF
or greater can be used as an output capacitors.
The PTSSOP-8 package is recommended for configuring
portable devices and large current application, respectively.
These robust devices are designed to prevent device failure
under the worst operation condition with both Thermal
Shutdown and Current Fold-back.
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FEATURES
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Very Low Shutdown Current < 2.0µA
Very Low Dropout Voltage: 300mV @ 300mA
Low Current Consumption: Typ. 60µA, Max. 70µA
Output Voltage: master LDO1 fixed at 2.5V or 3.3V, and
the slave LDO2 adjustable voltage
Output Current Range: 0mA ~ 300mA per LDO
PTSSOP-08 Package with Power Pad
High Accuracy Output Voltage: +/- 1.5%
Input Range of 2.6V to 7.0V
Independent Thermal Shutdown
Power Sequence
Power Good Output Function
Independent Bandgap
Current Limiting
Factory Pre-set Output Voltages
Short Circuit Current Fold-Back
Low Temperature Coefficient
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APPLICATIONS
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Battery-powered devices
Personal communication devices
Home electric/electronic appliances
PC peripherals
24 Hours Technical Support--WebSIM
Champion provides customers an online circuit simulation tool
called WebSIM. You could simply logon our website at
www.champion-micro.com for details.
PIN CONFIGURATION
PTSSOP-08 (PT-08)
Front View
1
2
3
4
G ND
VO UT1
VIN1
ENB
VFB2
VO UT2
VIN2
PG B
8
7
6
5
2002/09/30
Preliminary
Rev. 0.3
Champion Microelectronic Corporation
Page 1
CM2730
300mA D
UAL
L
OW
N
OISE
CMOS LDO
TYPICAL APPLICATION
RX1
OUTPUT1
INPUT1
GND
VOUT1
VIN1
ENB
VFB2
VOUT2
VIN2
PGB
VFB2
OUTPUT2
INPUT2
RX2
C1
C2
RX3
C4
C3
2.2uF
1.0uF
1.0uF
2.2uF
BLOCK DIAGRAM
VIN 1
VIN 2
VO U T2
VO U T 1
O vercurrent
S hutdow n1
O vercurrent
S hutdow n2
Therm al
S hutdow n1
Sequence
C ontrol1
EN B
R1
Therm al
S hutdow n2
R X1
-
AM P1
-
AM P2
+
VF B1
+
VFB2
Vref2 = 1.176V
R X2
G ND
2002/09/30
Preliminary
Rev. 0.3
Vref1 = 1.176V
Pow er C ontrol
PG B
R2
G ND
Champion Microelectronic Corporation
Page 2
CM2730
300mA D
UAL
L
OW
N
OISE
CMOS LDO
PIN DESCRIPTION
Pin Number
1
2
3
4
5
6
7
8
Symbol
GND
VOUT1
VIN1
ENB
PGB
VIN2
VOUT2
VFB2
Description
Master & slave LDO ground
Master LDO1 output voltage
Master LDO1 input voltage
Master LDO1 enable
Dual LDO power good signal
Slave LDO2 input voltage
Slave LDO2 output voltage
Salve LDO2 feedback signal
ORDERING INFORMATION
Part Number
CM2730KIT
CM2730SIT
Output Voltages
2.5V & Adjustable
3.3V & Adjustable
Temperature Range
-40℃ ~ +85℃
-40℃ ~ +85℃
Package
PTSSOP-08 (PT-08)
PTSSOP-08 (PT-08)
Note: For other pre-set output voltage requirements of fixed LDO1, please contact Champion Sales office.
ABSOLUTE MAXIMUM RATINGS
Input Voltage
Output Current
Output Voltage
…………….……………………………. +7V
…………………….……
P
D
/ (V
IN
- Vo)
…………………… GND-0.3V to V
IN
+0.3V
………………………………………… B
OPERATING RATINGS
Ambient Temperature Range (T
A
) ……... -40℃ to +85℃
Junction Temperature Range
V
IN1
– V
IN2
< 0.8V
…..…... -40℃ to +125℃
ESD Classification
THERMAL INFORMATION
Parameter
Thermal Resistance (Θ
jc
)
Thermal Resistance (Θ
ja
)
Internal Power Dissipation (P
D
)(ΔT = 100℃)
Maximum Junction Temperature
Maximum Lead Temperature (10 Sec)
Maximum
Unit
℃/W
℃/W
mW
℃
℃
150
300
*With Junction sink capable of twice times ofΘ
jc
Caution: Stress above the listed absolute rating may cause permanent damage to the device.
2002/09/30
Preliminary
Rev. 0.3
Champion Microelectronic Corporation
Page 3
CM2730
300mA D
UAL
L
OW
N
OISE
CMOS LDO
ELECTRICAL CHARACTERISTICS
T
A
= +25℃; unless otherwise noted
Parameter
Input Voltage 1
Output Voltage 1 Accuracy
Output Current 1
Current Limit 1
Short Circuit Current 1
Quiescent Current 1
Ground Pin Current
Line Regulation 1
Master
LDO1
Load Regulation 1
Dropout Voltage 1
Power Supply Rejection 1
Over Temperature Shutdown 1
Over Temperature Hysteresis
Output Voltage Temp. Coeff. 1
Output Noise 1
Input Voltage 2
Output Voltage 2 Accuracy
Output Current 2
Current Limit 2
Short Circuit Current 2
Quiescent Current 2
I
o2
= 1mA to 300mA
V
OUT2
> 1.2V
V
OUT2
> 1.2V
V
OUT2
< 0.95V
V
IN2
=5V, No Load
I
OUT2
=5mA, V
IN2
=V
OUT2
+1 to V
OUT2
+2, V
OUT2
<=2.0
Line Regulation 2
Slave
LDO2
I
OUT2
=5mA, V
IN2
=V
OUT2
+1 to V
OUT2
+2,
2V<V
OUT2
<=3V
I
OUT2
=5mA, V
IN2
=V
OUT2
+1 to V
OUT2
+2, V
OUT2
>3
Load Regulation 2
Dropout Voltage 2
I
o2
=1mA to 300mA
I
o2
=300mA, V
OUT2
=V
OUT2
-2.0%, V
OUT2
>=2.5V
I
o2
=300mA, V
OUT2
=V
OUT2
-2.0%, V
OUT2
<2.5V
I
O
= 100mA
C
O
=2.2µF ceramic
f=1kHz
f=10kHz
f=100kHz
-0.1
-0.15
-0.3
f=10Hz to 100kHz
I
o
= 10mA
C
o
=2.2µF
C
o
=100µF
Note 1
-1.5
300
300
450
150
30
0.02
0.03
0.06
0.20
300
800
60
60
50
150
30
25
f=10Hz to 100kHz
I
o
= 10mA
C
o
=2.2µF
C
o
=100µF
30
20
2.0
℃
℃
ppm/℃
μ
Vrms
µA
dB
35
0.1
0.15
0.3
1
%
mV
mV
I
o1
= 1mA to 300mA
V
OUT1
> 1.2V
V
OUT1
> 1.2V
V
OUT1
< 0.95V
V
IN1
=5V, No Load
V
IN1
=5V, I
o1
= 1mA to 300mA
I
OUT1
=5mA, V
IN1
=V
OUT1
+1 to V
OUT1
+2,
2.0V<V
OUT1
<=3.0V
I
OUT1
=5mA, V
IN1
=V
OUT1
+1 to V
OUT1
+2, V
OUT1
>3
I
o1
=1mA to 300mA
I
o1
=300mA, V
OUT1
=V
OUT
-2.0%
I
O
= 100mA
C
O
=2.2µF ceramic
f=1kHz
f=10kHz
f=100kHz
-0.15
-0.3
27
Test Conditions
CM2730
Min.
Note 1
-1.5
300
300
450
150
30
30
0.03
0.06
0.2
300
60
60
50
150
30
25
30
20
7
1.5
℃
℃
ppm/℃
μ
Vrms
V
%
mA
mA
mA
μA
%
%
dB
35
35
0.15
0.3
1
Typ.
Max.
7
1.5
Unit
V
%
mA
mA
mA
μA
μA
%
%
%
mV
Power Supply Rejection 2
Over Temperature Shutdown 2
Over Temperature Hysteresis
Output Voltage Temp. Coeff. 2
Output Noise 2
Shutdown Current
V
IN1
>V
IN1(MIN)
, V
IN2
>V
IN2(MIN)
, ENB = V
IN1
2002/09/30
Preliminary
Rev. 0.3
Champion Microelectronic Corporation
Page 4
CM2730
300mA D
UAL
L
OW
N
OISE
CMOS LDO
ELECTRICAL CHARACTERISTICS
(CONTI.)
T
A
= +25℃; unless otherwise noted
CM2730
Min.
Typ.
Max.
0.1
V
IN1
0.95V
OUT1
0.78V
OUT1
V
IN1
/2+0.8
V
IN1
/2-0.8
V
V
Parameter
Test Conditions
V
IN1
>V
IN1(MIN)
, V
IN2
>V
IN2(MIN)
,ENB=GND,
Unit
V
V
PGB (Note2)
V
OUT1
>0.95V
OUT1
, V
OUT2
>0.95V
OUT2
,
V
IN1
>V
IN1(MIN)
, V
IN2
>V
IN2(MIN)
,ENB=GND,
V
OUT1
<0.78V
OUT1
, or V
OUT2
<0.78V
OUT2
ENB=0, V
IN1
>V
IN1(MIN)
, V
IN2
>V
IN2(MIN)
ENB=0, V
IN1
>V
IN1(MIN)
, V
IN2
>V
IN2(MIN)
V
IN1
=2.6V to 7V
V
IN1
=2.6V to 7V
LDO2 Turn on Threshold Voltage (V
o1
)
LDO2 Turn off Threshold Voltage (V
o1
)
ENB Input Threshold
Note 1.
V
IN(MIN)
= V
OUT
+ Dropout Voltage
V
SH
V
SL
Note 2:
Dual LDO contains 2 LDO, one is fix output voltage 2.5V or 3.3V (2 versions), which is master LDO1, the other is
adjustable output voltage, which is slave LDO2. At normal operation condition, master LDO1 turns on first, and then slave LDO2
turns on as master LDO1 output voltage reaches to 95% spec. V
OUT1
. Slave LDO2 will turn off as master output decreases to
78% spec. V
OUT1
.
DETAILED DESCRIPTION
The CM2730 family of CMOS regulators provide a preset output voltage LDO (master LDO1), and one adjustable output voltage
LDO (slave LDO2) in which each contains p-channel pass transistor, voltage reference, error amplifier, over-current protection,
thermal shutdown, and short circuit protection.
CM2730 has a power sequence. When master LDO1’s output voltage, which is preset value in design, reaches to its 95~96%
nominal output value, internal logic circuits begin to enable the slave LDO2 function which is adjustable output voltage. When
both LDO output voltage values are larger than 95% of their nominal output voltage values, the PGB will go low.
The P-channel pass transistor receives data from the error amplifier, over-current shutdown, short output protection, and thermal
protection circuits. During normal operation, the error amplifier compares the output voltage to a precision reference. Over-current
and Thermal shutdown circuits become active when the junction temperature exceeds 150℃, or the current exceeds 300mA.
During thermal shutdown, the output voltage remains low. Normal operation is restored when the junction temperature drops
below 120℃.
The CM2730 switches from voltage mode to current mode when the load exceeds the rated output current. This prevents
over-stress. The CM2730 also incorporates current fold-back to reduce power dissipation when the output is short-circuited. This
feature becomes active when the output drops below 0.95V, and reduces the current flow by 65%. Full current is restored when
the voltage exceeds 0.95V.
EXTERNAL CAPACITOR
The CM2730 is stable with output capacitors to ground of 2.2µF or greater. It can keep stable even with higher or poor ESR
capacitors. A capacitor is recommended between the input and ground to stabilize each input voltage. The input capacitor should
be larger than 0.1µF to have a beneficial effect. All capacitors should be placed in close proximity to the pins. A “quiet” ground
termination is desirable.
2002/09/30
Preliminary
Rev. 0.3
Champion Microelectronic Corporation
Page 5
Power technology
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