Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.
Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube
Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)
Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.
Fixed Positive Standard Regulator
| Parameter Name | Attribute value |
| Maker | JCET |
| package instruction | , |
| Reach Compliance Code | unknown |
| ECCN code | EAR99 |
| Maximum input voltage | 25 V |
| Minimum input voltage | 7 V |
| JESD-30 code | R-PSFM-T3 |
| Number of functions | 1 |
| Number of terminals | 3 |
| Working temperatureTJ-Max | 150 °C |
| Working temperature TJ-Min | |
| Maximum output current 1 | 1.5 A |
| Maximum output voltage 1 | 5.25 V |
| Minimum output voltage 1 | 4.75 V |
| Nominal output voltage 1 | 5 V |
| Package body material | PLASTIC/EPOXY |
| Package shape | RECTANGULAR |
| Package form | FLANGE MOUNT |
| Regulator type | FIXED POSITIVE SINGLE OUTPUT STANDARD REGULATOR |
| surface mount | NO |
| Terminal form | THROUGH-HOLE |
| Terminal location | SINGLE |
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