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CJ3439KDW

Description
Drain-source voltage (Vdss): 20V Continuous drain current (Id) (at 25°C): 750mA, 660mA Gate-source threshold voltage: 1.1V @ 250uA Drain-source on-resistance: 520mΩ @ 1A, 4.5V Maximum power consumption Dispersion (Ta=25°C): - Type: N channel and P channel dual channel, N channel 20V, 0.75A, 380mΩ@4.5V; P channel: -20V, -0.66A, 520mΩ@- 4.5V
CategoryDiscrete semiconductor    MOS (field effect tube)   
File Size1000KB,6 Pages
ManufacturerJCET
Websitehttp://www.cj-elec.com/

Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); ​​QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

 

 

Download Datasheet Parametric View All

CJ3439KDW Overview

Drain-source voltage (Vdss): 20V Continuous drain current (Id) (at 25°C): 750mA, 660mA Gate-source threshold voltage: 1.1V @ 250uA Drain-source on-resistance: 520mΩ @ 1A, 4.5V Maximum power consumption Dispersion (Ta=25°C): - Type: N channel and P channel dual channel, N channel 20V, 0.75A, 380mΩ@4.5V; P channel: -20V, -0.66A, 520mΩ@- 4.5V

CJ3439KDW Parametric

Parameter NameAttribute value
Drain-source voltage (Vdss)20V
Continuous drain current (Id) at 25°C750mA,660mA
Gate-source threshold voltage1.1V @ 250uA
Drain-source on-resistance520mΩ @ 1A,4.5V
Maximum power dissipation (Ta=25°C)-
typeN channel and P channel

CJ3439KDW Preview

Download Datasheet
JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
SOT-363 Plastic-Encapsulate MOSFETS
CJ3439KDW
V
(BR)DSS
20
V
 
N channel+P Channel MOSFET
R
DS(on)
MAX
380mΩ
@
4.5V
 
450mΩ
@
2.5V 
520mΩ
@
-4.5V 
700mΩ
@
-2.5V 
-0.66A
800mΩ
@
1.8V 
 
0.75A
I
D
SOT-363
-20
V
 
950mΩ(TYP)
@
-1.8V 
 
FEATURE
Surface Mount Package
Low R
DS
(on)
Operated at Low Logic Level Gate Drive
ESD Protected Gate
Including a N-ch CJ3134K and a P-ch CJ3139K
(independently) In a Package
MARKING
APPLICATION
Load/ Power Switching
Interfacing Switching
Battery Management for Ultra Small Portable Electronics
Logic Level Shift
Equivalent Circuit
D1
6
G2
5
S2
4
1
S1
2
G1
3
D2
ABSOLUTE MAXIMUM RATINGS (T
a
=25℃ unless otherwise noted)
Parameter
N-MOSFET
Drain-Source Voltage
Typical
Gate-Source Voltage
Continuous Drain Current (note 1)
Pulsed Drain Current (tp=10us)
P-MOSFET
Drain-Source Voltage
Typical
Gate-Source Voltage
Continuous Drain Current (note 1)
Pulsed Drain Current (tp=10us)
Temperature and Thermal Resistance
Thermal Resistance from Junction to Ambient
(note 1)
Junction Temperature
Storage Temperature
Lead Temperature for Soldering Purposes(1/8’’ from case for 10 s)
R
θJA
T
J
T
STG
T
L
833
150
-55~+150
260
℃/W
V
DS
V
GS
I
D
I
DM
-20
±12
-0.66
-1.2
V
V
A
A
V
DS
V
GS
I
D
I
DM
20
±12
0.75
1.8
V
V
A
A
Symbol
Value
Unit
www.cj-elec.com
1
D,Mar,2016
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