CESDBLC5V0D3 datasheet, PDF - EEWORLD Datasheet

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CESDBLC5V0D3: File Size780KB，6 Pages; ManufacturerJCET; Websitehttp://www.cj-elec.com/; Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

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CESDBLC5V0D3 Parametric

Parameter Name	Attribute value
polarity	Bidirectional
Reverse shutdown voltage (typ)	5V
Breakdown voltage (minimum value)	5.8V
clamping voltage	10V
Peak pulse current (10/1000us)	5A

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JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD

SOD-323

CESDBLC5V0D3

DESCRIPTION

Plastic-Encapsulate Diodes

Bi-direction ESD Protection Diode

SOD-323

Designed to protect voltage sensitive electronic components from ESD and other

transients. Excellent clamping capability, low leakage, low capacitance, and fast

response time provide best in class protection on designs that are exposed to ESD.

The combination of small size, low capacitance, and high level of ESD protection

makes them a flexible solution for applications such as HDMI, Display Port TM, and

MDDI interfaces. It is designed to replace multiplayer varistors (MLV) in consumer

equipments applications such as mobile phone, notebook, PAD, STB, LCD TV etc.

FEATURES



Bi-directional ESD protection of one line

Low capacitance: 12pF(Typ.)

Low reverse stand−off voltage: 5.0V

Low reverse clamping voltage

Low leakage current



Excellent package:1.7mm×1.3mm×1.0mm

Fast response time

JESD22-A114-B ESD Rating of class 3B per human

body model

IEC 61000-4-2 Level 4 ESD protection

APPLICATIONS



Computers and peripherals

PAD

Audio and video equipment

Cellular handsets and accessories



Subscriber identity module(SIM) card protection

Portable electronics

Other electronics equipments communi-

cation systems

MARKING

H = Device code

Front side

www.cj-elec.com

C,May,2014

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