Home > Optoelectronic Circuits >Optoelectronic Display Circuits > LCD TV power supply application circuit diagram

LCD TV power supply application circuit diagram

Source: InternetPublisher:常思一二 Keywords: lcd television lcd circuit power supply Updated: 2020/10/31

5.jpg

The PLC810PG combines PFC and LLC offline controllers with an integrated high-voltage half-bridge driver. Figure 1 shows a schematic diagram of the power supply structure using the PLC810PG device, in which the LLC resonant inductor is integrated in the transformer.

The PFC part of the PLC810PG adopts a universal input continuous current mode (CCM) design that does not require a sinusoidal signal input reference, thereby reducing system cost and external components.

DC-DC controller drives L LC resonant topology. This variable frequency controller allows the MOSFET to switch at zero voltage, thus eliminating most of the switching losses and improving efficiency. The core of the LLC controller is a current-controlled oscillator whose frequency control range supports the traditional operating frequency of the TV power supply.

In order to ensure zero-voltage switching, the dead time of the LLC switch in the PLC810PG is strictly controlled within the tolerance range and can be adjusted through an external resistor. The duty cycles of the high and low voltage ends are closely matched to provide balanced output current, thereby reducing the cost of the output diode.

A typical PLC810PG LLC design operates at 100 kHz (under rated operating conditions). Depending on the design of the LLC circuit, the switching frequency can vary from one-half to three times the rated operating frequency, which is related to input voltage and load changes.

The frequency of the PFC converter is locked to the LLC to reduce noise and electromagnetic interference. Increasing the PFC frequency in synchronization with the LLC at light load reduces the current drawn by the PFC boost converter when transitioning to discontinuous mode, thereby improving light load operation and reducing power line harmonics.

The design also provides PFC and LLC primary-side fault management capabilities. The PFC PWM output phase can be dynamically adjusted based on the LLC phase so that the switching edges do not intersect noise-sensitive portions of the PWM and LLC timing circuits. Edge conflict avoidance technology simplifies power supply layout and improves performance. Phase synchronization reduces EMI spectral content and ripple current in the PFC capacitor.

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号