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DC power supply delay circuit diagram illustration

Source: InternetPublisher:念念Brown Keywords: SCR delay circuit DC power supply Updated: 2024/03/27

DC power supply delay circuit diagram (1)

The circuit diagram shown here is a simple SCR based DC power delay circuit. This circuit is very convenient and can be used in many applications. The working principle of this circuit is very simple. When input power is applied, capacitor C2 charges through resistor R2 and when the voltage across the capacitor just exceeds the breakdown voltage of Zener diode D3, it fails and triggers SCRH1 and the delay power will be available at the delay OUT terminal.

The circuit must be assembled on a high quality PCB.

The Zener diode must be rated for half the input supply voltage.

The current capacity of the circuit depends on the SCR, here it is 4A.

DC power supply delay circuit diagram (2)

When designing electronic circuits. Sometimes you want the power to be turned on after a delay after closing the switch. For example, on a device with output, it is hoped that the device will work stably before outputting. In audio amplifiers, wait for the amplifier to stabilize before turning on the speakers, etc.

Figure 1 is such a delay circuit. The time base circuit 555 is used as a timer to drive the relay and delay for a period of time after the power switch is turned on. Connect or disconnect the circuit again. The delay time is determined by the capacitor C and the resistor R. When R=100kQ2.C=10uF, the delay time is about 1.1 seconds.

When a relay is not desired, a transistor can be used to delay the switching on of the DC voltage. The circuit is shown in Figure 2.

When the circuit in Figure 1 and Figure 2 is working, as long as the manual switch K is turned on the +12V power supply, the monostable circuit composed of NE555 will work, and its ③ pin will output a high level. In the circuit of Figure 1, the relay contact K and Vout are connected to the +12V power supply for external loads: In the circuit of Figure 2, when the transistor T (PNP type) is turned on, its Vout is connected to the +12V power supply for external loads. Load usage.

DC power supply delay circuit diagram (3)

Figure 1-21 shows the DC delay cut-off switch circuit, which is controlled by unidirectional thyristor and powered by DC power supply. It includes a delay circuit composed of diode VD 3 and capacitor C 1 , NOT gates D 1 and D 2 and resistors R 2 and The Schmitt trigger shaping circuit composed of R 3, the control circuit and load composed of unidirectional thyristor VS.

The working principle of the DC delay cut-off switch circuit is that after the power switch S is turned on, the power supply + V CC passes through VD 3 to quickly fully charge C 1 . After the Schmitt trigger shaping process of the voltage on C 1 composed of D 1 , D 2 , etc., the unidirectional thyristor VS is triggered to conduct through the resistor R 4 and the load operates. This process is very fast and can be understood as the load working immediately after turning on the power switch S.

When the power switch S is turned off, since the voltage across the capacitor cannot change suddenly, the voltage on C 1 is still "1", the Schmitt trigger output voltage is still "1", and the unidirectional thyristor VS remains on due to the presence of the trigger voltage. status, the load continues to work.

At this time, the voltage on C 1 begins to discharge through the input terminals of R 2 and D 1 . As the discharge proceeds, the voltage on C 1 continues to decrease. After a certain period of time, when the voltage on C 1 drops to the negative threshold voltage of the Schmitt trigger, the Schmitt trigger flips, the output voltage becomes "0", the unidirectional thyristor VS is cut off due to the loss of trigger voltage, and the load Just stopped working.

The discharge time of C 1 is the delayed cut-off time of the circuit. Since the input impedance of the CMOS NOT gate is very high and the discharge process is very slow, a smaller capacitor can be used to obtain a longer delay time. Changing the size of C 1 can change the delay time.

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