Is the question about the simulation time? Generally speaking, the simulation time is set according to the conclusions that need to be obtained. Especially when the simulation time is relatively long, it is sufficient to observe the necessary signal relationships. However, modern verification methodology advocates ABV (Assert-Based Verification), which uses machines to verify according to a certain coverage rate. This is very important for more complex circuit verification. Because in the case of simple circuits, manual observation methods may be ok, but if the circuit system has thousands of signals and many changes, manual observation methods are impossible. We will discuss ABV in subsequent courses. For UART transceivers, it is not complicated and can still be observed manually. In our example, four words are sent and received in a closed loop, so the simulation time must be observed to see whether they are finally received correctly.
The approximate calculation is:
1. One baud rate cycle (1/9600=104us) 2. Each frame consists of 1 start bit, 8 information bits, 2 stop bits, and 1 idle bit, a total of 12 bits. 3. In this way, each UART frame requires 12*104us=1248us 4. Four frames are sent in our example, so a total of 4*1248=4992us is required 5. In this way, from the start of sending (end of write request) to the completion of four frame transmission, we set 6000us, which is acceptable 6. After that, a read request is issued, which is very fast (four beats of the 200M clock) 7. After the read request, the simulation can be stopped.
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