Op amp offset voltage debugging and reflection

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Op amp offset voltage debugging and reflection [Copy link]

      Regarding the output of an op amp in the project, there is an offset voltage of about +-20mV, that is, the output voltage may have a deviation of about 20mV from the input voltage, and it is different for different boards. Some are +20mV, some are -20mV, and some have no deviation. Due to the high system requirements, the deviation is theoretically within 2mV from the chip itself. In order to find the cause of this input offset, I spent nearly half a week last week to test the circuit. Determine the essence of the problem. First, use the basic knowledge of calculating op amps, after KCL and the virtual short and virtual disconnection of the op amp, first do a theoretical analysis. It is found that the theoretical calculation shows that the input and output are consistent, and no error is introduced. Of course, at this time, many of the calculations are idealized. The resistor does not take into account the error, and does not take into account the input offset voltage of the chip itself. It is only a theoretical calculation, and Vo = Vda is obtained. In this calculation, the circuit is theoretically verified. At the beginning, according to the theoretical calculation, when testing the circuit, there is no place to start. Because I don’t know where the problem will be. I don’t know where the error is most likely to be caused. When you have no idea, modify the circuit and test it. First, disconnect the back-stage circuit to remove the influence of the back-stage circuit on the circuit, and then measure the input and output of the two boards. It is found that it is the same as when the back-stage circuit is not disconnected. This shows that the problem lies in the op amp. Then, disconnect the input stage circuit, connect the input of the op amp directly to the ground, and observe the output of the op amp. At this time, it is found that the output of the op amp is not zero, but 28mV, so it can be determined that the problem has nothing to do with the DA output of the front-stage circuit of the op amp, so the problem is locked in the op amp circuit. After that, try to bring the error parameters of the op amp itself into the calculation process, and get Vo= Vda+E; E is the error that may be brought in because of the op amp. The calculation found that according to the op amp's Datasheet, E is the difference between the offset voltage of the op amp itself and the voltage difference between V+ and V- during the virtual short, and the maximum value of this difference may be 6mV. However, the actual test found that the actual value E here is less than 5mV. So the cause of the problem is still not found. Finally, considering the resistance, all resistors are directly brought into the calculation without idealization. Finally, we get a result Vo = (R3/R2)*Vda + (1+R3/R2+R3/R2)*E1 - E2 + R3(R4*R2-R5*R1)*Vc/(R1*R2(R4+R5)) E1 = V+ - V-;(V+ positive input, V- reverse input) E2 = 1mV(Typevalue); Vc power supply voltage 5V According to this result, if the value of R4*R2-R1*R5 on the input resistor is not zero, it may bring in a worse error. So we swapped R1 and R2 on the board and found that the output of the op amp was indeed different. The offset became smaller. We tried a few more boards and found that some of them had an offset value of less than 1.5mV after adjustment, but some of them changed from the original positive offset to a negative offset. Since the modification here corrected some problems, temporarily, the problem is locked here. This week, I calculated the parameters of the entire system again. I found that since the output of the op amp will be calibrated when it is used, the calibration value will be subtracted afterwards. In this way, the processing of the op amp output at the interrupt display when it is used becomes V = (R3/R2) * (V1 - Vo) V1 is the output of the op amp this time; Vo is the output of the op amp during calibration; Since the error value behind is fixed, it is eliminated. In this way, even if there is an offset voltage, the impact is not very large. As long as the negative offset voltage of the op amp is not negative, it is fine. Through the entire test process of this offset voltage, I have a few thoughts as follows: When analyzing a problem, the theoretical calculation can be verified in theory whether it is feasible. For the analysis of actual circuit problems, you can idealize it first and verify it in theory first. Generally speaking, if it does not pass the theory, it is likely to have problems in practice. If there is no problem, then de-idealize it, conduct actual analysis, take all factors (or some factors) into account, get the result, and find the one with the greatest influencing factor. When verifying the analysis of the calculation, you must first verify the influence of the previous and next stages and exclude the influence caused by the periphery. When analyzing a problem, we need to consider the whole system. If we only look at the output of the op amp, it is indeed very bad. However, due to the calibration operation of the terminal, the offset voltage is eliminated. On the contrary, the offset voltage has little effect on the result. If we analyze from the perspective of the whole system at the beginning and find the quantity that has the greatest impact on the result, we will not be so nervous when we find the offset voltage. Because it has little impact on the result. In the end: When we solve a problem, we need to find the key part and the essential part that affect our problem. If we find these, we may not have to worry about some details. If we don’t find them, even if we make a lot of efforts, it may not be of much help to the result of the problem. However, the efforts and efforts that do not see the essence of the problem are very valuable for learning itself. It promotes us to think and reflect. It will promote the improvement of our own abilities. Many epoch-making theories and inventions are born out of mistakes. If we only solve the problem, the efforts that do not find the essence of the problem may be in vain; but for a person who improves his personal thinking, not finding the essence of the problem may inspire more thinking and create more. The result is important, and the process is equally important. In the short term, the result is more important; in the long term, the process is more important. The result determines the present, and the process determines the next result. Thinking that does not see the essence now is for the purpose of training to see the essence in the future. Thinking that directly sees the essence of the problem now is the result of previous thinking (but without the possibility of innovation, the more knowledge there is, the less innovation there is). This is a contradiction. How to balance? Solving problems directly brings efficiency. Solving problems indirectly brings thinking. Making mistakes gives us the opportunity to learn. The more we learn, the fewer mistakes we make. The fewer mistakes we make, the fewer opportunities we have to learn. The less we learn, the more mistakes we will make again. Making mistakes again gives us the opportunity to learn again... This is a balance.