Issues that should be paid attention to when learning NRF24L01

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Issues that should be paid attention to when learning NRF24L01 [Copy link]

When nrf24L01 is set to receive mode, it can receive data through 6 different data channels (data pipes). Each data channel has a unique address but the frequency of each data channel is the same. This means that 6 nRF24L01s configured in the transmit state can communicate with one nRF24L01 configured in the receive state, and the receiver can distinguish them (by judging bits 1-3 of the status register). Data channel 0 has a unique 40-bit configurable address. The remaining channels 1 to 5 have the same first 32 bits of address, but different last 8 bits. All data channels can implement Enhanced ShockBurst mode. On the transmit side, data channel 0 is used to receive confirmation information, so the address of data channel 0 on the transmit side must be equal to the transmit address so that the response information can be received. When a 24L01 finishes sending, it will turn on the receiver and wait for confirmation. If no confirmation is received, it will resend until confirmation is received. When the number of retransmissions exceeds a certain number, an interrupt is issued and the status register is changed. The limit on the number of retransmissions is set in the SETUP_RETR_ARC register. Whenever confirmation is received, the previous data packet is considered to have been sent successfully, and this data packet will be cleared from the transmit buffer, and TX_DS IRQ will be set high. Each time spi write is started, the status word is read back. Enhanced ShockBurst packet format Preamble 1 byte Address 3-5 bytes Packet control 9 bits Payload 0-32 bytes CRC 1-2 bytes Address is the receiver address Packet control Payload length 6 bits Pid 2 bits NO_ACK 1 bit Payload length: 6 bits Description Up to 32 bytes Pid: used for packet numbering, used to determine whether it is a retransmitted packet or a new packet NO_ACK: used to indicate whether to automatically respond. If it is 1, it means that no automatic response is required. The delay and number of retransmissions of the automatic response are programmable. The relationship between the working mode, registers and IO ports of 24L01 is as follows: The role of the CE pin: One ESB (Enhanced ShockBurst) cycle, sending a byte and receiving an ACK takes about 339us. From the powerdown state, you need to enter the standby state first. This state transition requires a 1.5ms delay. From the standby state to the rx/tx state, it takes 130us. Set CE high for at least 10us to start Enhanced ShockBurst transmission. Data transmission process in Enhanced ShockBurst mode 1. Configure the config register and set PRIM_RX to 0, indicating the transmission mode 2. When data needs to be sent, first configure the address TX_ADDR, which should be the address of the receiving end (that is, it should be one of the 6 data pipe addresses of the receiving end to ensure that the other party receives it). If you want to use automatic response, because the response message is received by the datapipe0 of the sending end, the address of the sent datapipe0 should be equal to TX_ADDR (if it is the same address as the last transmission, the address does not need to be rewritten). 3. Configure the data payload length TX_PLD, send the data to be sent to nrf24L01, and when the data payload is continuously written through SPI, nrf24L01 will automatically count the number of bytes. (The data payload must be written continuously when cs is low) 4. Set CE high and maintain it for at least 10us. This pulse will start the ShockBurst transmission 5. NRF24L01: a) Turn on the RF b) Start the crystal oscillator c) Pack data d) Send data 6. If automatic response is enabled (and the number of retransmissions does not reach the maximum value), NRF24L01 will automatically enter the receiving state. 1: If the response packet is received within the specified time, it is a successful transmission, the data in the TX FIFO is cleared, and the TX_DS bit in the status register is set high. 2: If the response packet is not received within the specified time, it will be automatically retransmitted (when automatic retransmission is enabled, the number of retransmissions is specified by the ARC bit in the SETUP_RETR register). 3: When the maximum number of retransmissions is reached and no response is received, the MAX_RT in the status register is set high, and the data in the TX FIFO buffer is not removed. When MAX_RT or TX_DS is set high, an interrupt will be caused on the IRQ pin (low level is valid, and the corresponding bit in the status register can be cleared). After the maximum number of retransmissions is reached and an interrupt is caused, no data can be sent before MAX_RT is cleared. Each time a MAX_RT interrupt occurs, the PLOS_CNT counter is incremented by 1 to count the number of packet losses. 7. After CE is set low, the device enters the STANDBY_I state. Otherwise, the next data payload in the TX FIFO buffer will be sent. If the data buffer is empty and CE is still high, the device will enter the STANDBY-II mode. 8. If the device is in STANDBY-II mode, when CE is set low, the device will enter the STANDBY-I mode. (STANDBY mode can reduce current consumption. In this mode, SPI communication can still be completed.) Data receiving process in Enhanced ShockBurst mode 1. Set PRIM_RX in the config register to 1 and set CE to high 2. After 130us, NRF24L01 starts to monitor the RF signal 3. When a legal packet is received (address match), the data is stored in the RX-FIFO buffer, RX_DR in the status register is set high, and the IRQ pin sends an interrupt signal at the same time (if the signal is not masked). RX_P_NO in the Status register indicates the DATA PIPE number that should receive the data. 4. If automatic response is enabled, an acknowledge signal will be sent 5. The MCU will set CE low to enter STANDBY-I mode 6. The MCU can read the received data through SPI In addition: Regarding the 24L01 networking, there are a few points that should be noted: (1) Note that the address allocation document clearly states that only channel 0 has a 5-byte configurable address, and the other 5 nodes have only 1-byte freely configurable addresses. For example, the receiving node can be configured like this: uint const RXADR0[RX_ADR_WIDTH]= {0x34,0x43,0x10,0x10,0x01}; //Receive address uint const RXADR1[RX_ADR_WIDTH]= {0xc2,0xc2,0xc2,0xc2,0xc1}; //channel 1 address uint const RXADR2[1]= {0xc2}; //channel 2 address uint const RXADR3[1]= {0xc3}; //channel 3 address uint const RXADR4[1]= {0xc4}; //channel 4 address uint const RXADR5[1]= {0xc5}; //channel 5 address Then set the address of each sending node to be the same as the corresponding channel address of the receiving end (2) The receiving node distinguishes each sending node. This is to judge the 1-3 bits of the status register to achieve the purpose of distinction. A Tx initialization process initialization steps 24L01 related registers 1) Write the address of the Tx node TX_ADDR 2) Write the address of the Rx node (mainly to enable Auto Ack) RX_ADDR_P0 3) Enable AUTO ACK EN_AA 4) Enable PIPE 0 EN_RXADDR 5) Configure the number of automatic retransmissions SETUP_RETR 6) Select the communication frequency RF_CH 7) Configure transmit parameters (LNA gain, transmit power, wireless rate) RF_SETUP 8) Select channel 0 valid data width Rx_Pw_P0 9) Configure the basic parameters of 24L01 and switch the working mode CONFIG Rx initialization process Initialization steps 24L01 related registers 1) Write the address of the Rx node RX_ADDR_P0 2) Enable AUTO ACK EN_AA 3) Enable PIPE 0 EN_RXADDR 4) Select the communication frequency RF_CH 5) Select channel 0 valid data width Rx_Pw_P0 6) Configure transmit parameters (LNA gain, transmit power, wireless rate) RF_SETUP 7) Configure the basic parameters of 24L01 and switch the working mode CONFIG