[ArtInChip D133CBS] Domestic application replacement for RT1050, let’s take a look together.

匠芯创科技

[ArtInChip D133CBS] Domestic application replacement for RT1050, let’s take a look together. [Copy link]

 

D13x is a high-performance, domestically produced, industrial-grade full HD display and intelligent control MCU based on RISC-V. It is equipped with a powerful 2D graphics acceleration processor, PNG decoding, JPEG encoding and decoding engine, and rich screen interfaces. It supports industrial wide temperature, has high reliability and high openness, and can be widely used in industrial HMI, gateways, serial port screens and other pan-industrial and smart home fields.

CPU core-
Single-core E907, RV32IMAFDCP instruction architecture, 480MHz@1.1V
- L1 instruction cache 32KB, L1 data cache 32KB
- Single-precision/double-precision floating-point unit, integrated DSP instruction set-
Physical memory protection (PMP)
- In-core interrupt CLINT and interrupt controller CLIC
System boot-
Scan and boot in the order of SD Card (SDMC1) → SPI NOR → SPI NAND → eMMC (SDMC0) by default- Boot
media can be changed and fixed by burning eFuse
System security-
Support digital signature secure boot-
Security algorithm acceleration engine (Crypto Engine, CE), support AES/TDES/RSA encryption and decryption algorithms and SHA/HMAC digest algorithms-
SPI bus encryption module (SPI Crypto, SPI ENC), support SPI NAND/SPI NOR online encryption and decryption- Built-in eFuse 2048 bits, of which 512 bits are for customer
customization-
Built-in 256bits TRNG generator
On-chip storage-
BROM 64KB
- SRAM 1MB, of which 256KB can be configured for TCM use
- PSRAM has two specifications to choose from:
64Mb, 16-bit bit width, maximum frequency 200MHz DDR
32Mb, 8-bit bit width, maximum frequency 200MHz DDR
- Support spread spectrum function
Storage interface-
QSPI supports SPI NOR Flash / SPI NAND Flash
Supports single/dual/quad data lines
Supports maximum rate SDR 100MHz
- eMMC 4.41/SD 3.01/SDIO 3.0, two sets in total
eMMC 4 data lines, support SDR25/SDR50/DDR50 mode
SD card, support SDR25/SDR50 mode
Supports maximum rate DDR 50MHz, only supports 3.3V IO voltage
Graphics Engine
- DE Display Engine:
Supports one UI layer, one VI layer, with the highest performance of 720P@60fps
Supports 1/31.999x ~ 32x scaling of VI layer
Supports dithering, gamma and color matrix adjustment-
GE Graphics Engine:
Supports 2D graphics acceleration, with the highest performance of 1080P@60fps
Supports horizontal and vertical flipping, 90/180/270 degree rotation
Supports arbitrary angle rotation and different scanning orders of RGB format
Supports 1/16x ~ 16x scaling, using 6x4 taps 16 phases filtering algorithm
Supports command queue-
VE Video Codec:
MJPEG baseline decoder, with the highest performance of 720P@60fps
PNG decoder, with the highest performance of 720P@60fps
JPEG encoder, the highest performance is 720P@60fps
Display interface
- Support 24-bit parallel RGB, the highest performance is 720P@60fps
- Support single link LVDS, the interface rate is up to 700Mbps, the highest performance is 720P@60fps
- Support MIPI DSI 1/2/4 LANE, the interface rate is up to 1Gbps, the highest performance is 720P@60fps
- Support SRGB/I8080/QSPI Screen interface
- Support DVP 8-bit input, the pixel clock is up to 150MHz, the highest performance is 1080P@30fps
- Support spread spectrum function
Audio interface
- Left and right channel digital PWM output (DSPK)
- Two-channel digital microphone (DMIC) interface input
- One I2S, support input and output, support TDM mode
General interface
- One USB2.0, which can be configured as DEVICE/HOST
- One EMAC, support 100M RMII, supports IEEE1588 protocol
- Four SPIs, supports 3-wire/4-wire interface, configurable as Master/Slave
- Eight UARTs, supports 2-wire/3-wire/4-wire interface, compatible with industrial standard 165500, baud rate up to 5Mbps, baud rate deviation <2%
- Three I2Cs, supports 7 bits and 10 bits addressing, maximum rate 400Kb/s
- Two CANs, supports CAN2.0A and CAN2.0B, programmable communication rate up to 1Mbps
- One CIR, supports infrared input and infrared output
- One PBUS, supports 16-bit 100MHz clock, used for read and write access to external device address space, rate 100MB/s
- Five GPIOs, a total of 84 IOs, support independent configuration of each IO:
Optional no pull-up/pull-up 33KΩ/pull-down 33KΩ
Output drive eight gears
adjustable Supports secondary debounce and interruption
Supports bit operation
Counter
- GTC General Timer
Supports 52-bit timer, provides system heartbeat clock, and the timing period is greater than 35 years
Supports debugging mode, which can be configured to pause timing or continue timing
- WDOG Watchdog
Supports interruption and reset, and the timeout period is configurable from 1ms to 37 hours
Supports debugging mode, which can be configured to pause timing or continue timing
Support hardware write protection mechanism
- RTC Real-time
Clock In seconds, 100-year time span, support hardware alarm setting
External 32.768KHz crystal, support digital calibration, range ±975ppm
Independent backup power input pin, built-in power switch
128bits register for system data backup, such as power failure to protect data
RTC module working current 2uA
- PWM
Built-in 16-bit counter, support four-way timer
Support up to eight independent PWM or four complementary PWM
- EPWM
Built-in 16-bit PWM counter, support 12-way timer
Support up to 24 independent PWM or 12 complementary PWM
Support hardware triggered ADC sampling
Support output fixed number of pulses
EPWM0~5 support high-precision PWM with an accuracy of 156ps
-
CAP Built-in 32-bit CAP counter, supports six-channel timer
Supports up to six input signal capture or six simple PWM signal output
Supports continuous capture mode or single capture mode
Analog
- Built-in 12-channel 12-bit PSADC, sampling rate up to 2MSPS
- Built-in 8-channel 12-bit GPADC, sampling rate up to 2MSPS
- Integrated RTP resistive touch screen interface
Clock and power
- Chip clock source
Support crystal-free solution, use built-in OSC24M, accuracy ±1%
Support external 24MHz crystal, accuracy depends on the crystal-
CMU has four built-in PLLs:
PLL_INT0 is used by CPU alone
PLL_INT1 is used by bus, internal module, and low-speed interface module
PLL_FRA0 is used by storage interface module, supports spread spectrum
PLL_FRA2 is used by screen output module, supports spread spectrum-
SYSCFG has three built-in LDOs:
LDO25 (2.5V 100mA), used for system reset startup, ADC power supply, eFuse power supply
LDO18 (1.8V 100mA), can be used for PSRAM IO and PSRAM particle power supply
LDO1x (0.9~1.9V 500mA, 50mV per gear), can be used for VDD11_SYS power supply
- Built-in THS temperature sensor, supports high and low temperature interrupt alarm and over-temperature reset chip

haocede

Single-core E907, RV32IMAFDCP instruction architecture, 480MHz@1.1V
- L1 instruction cache 32KB, L1 data cache 32KB
- Single/double precision floating point unit, integrated DSP instruction set
- Physical memory protection (PMP)
- In-core interrupt CLINT and interrupt controller CLIC

damiaa

It is used for point screen. It seems to support lvds mipi dsi psram up to 8M

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damiaa posted on 2023-12-18 08:49 It is used for point screen. It seems to support lvds mipi dsi psram up to 8M

Screen display + control, with EPWM