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[CW32L052R8T6 Evaluation Board Evaluation] IV. Program Development --> 2. PWM Output [Copy link]

 
This post was last edited by Haoyueguangxifeiziming on 2023-8-14 21:17

4. Program Development-->2. PWM Output

This time we mainly focus on the timer output PWM waveform. First, configure the IO port

void GPIO_Configuration(void)
{  	
    //PWM
	CW_GPIOA->ANALOG &= ~GPIOx_ANALOG_PIN6_Msk;	
	CW_GPIOA->AFRL_f.AFR6=6;
	CW_GPIOA->DIR &= ~GPIOx_DIR_PIN6_Msk;	
}

Then configure the general timer GTIM1 according to the reference manual

Figure 1 PWM function configuration

void GTIM1_Configuration(void)
{
    GTIM_InitTypeDef GTIM_InitStruct = {0};
    // APB1_CLK = 16MHz
    GTIM_InitStruct.Mode = GTIM_MODE_TIME;
    GTIM_InitStruct.OneShotMode = GTIM_COUNT_CONTINUE;
    GTIM_InitStruct.Prescaler = GTIM_PRESCALER_DIV1;    
    GTIM_InitStruct.ReloadValue = 7;
    GTIM_InitStruct.ToggleOutState = DISABLE;
    GTIM_TimeBaseInit(CW_GTIM1, >IM_InitStruct);
    GTIM_OCInit(CW_GTIM1, GTIM_CHANNEL1, GTIM_OC_OUTPUT_PWM_LOW);  
    GTIM_SetCompare1(CW_GTIM1, (GTIM_InitStruct.ReloadValue + 1) * 0.1);
    GTIM_Cmd(CW_GTIM1, ENABLE);	
}

According to the classic frequency division formula

F=f÷((pcs+1)*(add+1))

The following PWM square waves with different frequencies and duty cycles are obtained at the PA05 pin:

Figure 2 PWM: 20kHz, 50%

Figure 3 PWM: 20kHz, 90%

Figure 4 PWM: 20kHz, 20%

Figure 5 PWM: 40kHz, 50%

Figure 6 PWM: 50kHz, 50%

Figure 7 PWM: 1MHz, 50%

Figure 8 PWM: 2MHz, 50%

Figure 9 PWM: 2MHz, 10%

After measurement, the PWM output waveform set by the evaluation board GTIM1 is normal. The rising and falling edges are about 50ns below MHz, and about 80ns above MHz (due to the influence of wiring, the actual output quality should be > this experimental data)

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The rise time is still quite short. Is this related to the speed of the IO port?   Details Published on 2023-8-16 14:04
 
 

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The rise time is still quite short. Is this related to the speed of the IO port?

This post is from Domestic Chip Exchange

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This has little to do with the hardware design and software definition of the IO port. The PWM generation mechanism is operated by the pulse width modulator in the timer module, which is irrelevant to the design of the IO and belongs to the Timers. The timer group only borrows the output window of the IO and does not enter the relevant circuit of the IO. (The red  Details Published on 2023-8-17 17:08
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This post was last edited by Haoyueguangxifeiziming on 2023-8-18 09:10
Qintianqintian0303 posted on 2023-8-16 14:04 The rise time is still quite short. Is this related to the speed of the IO port?

This has little to do with the hardware design and software definition of the IO port. The PWM generation mechanism is operated by the pulse width modulator in the timer module, which is not related to the IO design and belongs to the Timers. The timer group only borrows the output window of the IO and does not enter the relevant circuit of the IO driver part (the red below is the internal circuit structure of the IO, and the purple is the PWM output path. You can see that the PWM output path is independent of the IO driver circuit). Its rise and fall time is completely dependent on the output comparator in the PWM modulator. Therefore, the rise/fall time of the output square wave = the output rise/fall time of the comparator + the charge and discharge time of the line parasitic capacitance. This is roughly the relationship.

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