[Xianji HPM6750 Review 8] Detailed description of the small twists and turns encountered by SPI peripherals

RCSN

[Xianji HPM6750 Review 8] Detailed description of the small twists and turns encountered by SPI peripherals [Copy link]

 

Since the last post about debugging SPI DMA failed, it has been put on hold until now. The official version V0.11.0 has just been released, and this time SPI DMA has been restored.

What's strange is that after porting the official SPI DMA, it has never been successful and the DMA completion interrupt cannot be triggered. I used an analyzer to capture the waveform, but I still couldn't see the timing occur.

So I tried it according to the official example. Sure enough, the official demo can run and send data through DMA. I saw that the official example has assigned values to the command and address registers, so I made a temp address and command and assigned values accordingly. Sure enough, it was really sent out. The data can also be completely matched.

According to previous development experience, if only data needs to be transmitted, the address segment and command segment should be disabled, and there is no need to operate the address and command registers.

But in fact, although the command segment and address segment are disabled, the two registers CMD and ADDR need to be assigned values.

In the official driver, regardless of whether it is prohibited or not, the corresponding registers will be assigned values

Now it can be sent, but when sending large data in packets, the packet size is greater than 512, so the sending fails. I checked the register again. The data length of TRANSCTRL is 9 bits, which means it can only be 512 bits long. This SPI IP is indeed a bit unique. Most of the previous developments were more than 16 bits, which means that only 512 packets can be sent during DMA transmission.

Verify it:

SPI DMA transfer, O3 code optimization, about 45fps

The SPI poll transmission is also optimized in O3 code, which can reach about 41fps

It seems that DMA is not that helpful for SPI transmission, mainly because the maximum size of SPI data register is 512.

Here, for the SPI DMA peripheral using HPM6750, the following two points need to be noted:

1. SPI DMA can transfer up to 512 bytes at a time. If the number exceeds this, it needs to be sub-packetized.

2. When using SPI DMA, you need to assign values to the command and address registers when configuring the send. Any value will do.

Of course, after asking the official, we learned that these problems will be solved at the driver level, and future SDK updates will not expose such problems to user operations.

devinfanyang

Compared with the previous version, the performance seems to have improved by 50%

xusiwei1236

OP, what kind of driver IC is this small screen?

RCSN

xusiwei1236 posted on 2022-6-5 22:13 OP, what is the driver IC of this small screen?

ST7789V

hustjtj0806

Chips are like this, constantly iterating and improving. I hope Xianji's high-performance MCU will get better and better!