[AT-START-F425 Review] + Comparison of hardware SPI and software simulation SPI speed
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This post was last edited by freeelectron on 2022-4-19 17:31
1. Introduction
This article uses AT32F425 to drive RC522 to test the rate of SPI1. For detailed code operation of RC522, please refer to the post [GD32L233C-START Review] 7. Hardware SPI1 driver RC522 .
2. About AT32F425 SPI
The AT32F425 series has a maximum of 3 spis, and this article uses SPI1.
3. Maximum rate of SPI1
SPI1 is connected to APB2 bus, and the maximum speed of APB2 bus is 96MHz;
The maximum rate of SPI is f PCLK /2, which is 48Mhz.
4. Code Implementation
/*SPI1 :
PA4/CS
PA5/SCK
PA6/MISO
PA7/MOSI
*/
(1) Analog SPI
#define SET_SPI_CS gpio_bits_set(GPIOA, GPIO_PINS_4)
#define CLR_SPI_CS gpio_bits_reset(GPIOA, GPIO_PINS_4)
#define SET_SPI_SCLK() gpio_bits_set(GPIOA,GPIO_PINS_5)
#define CLR_SPI_SCLK() gpio_bits_reset(GPIOA,GPIO_PINS_5)//SCL=SCLK
#define SET_SPI_MOSI() gpio_bits_set(GPIOA,GPIO_PINS_7)
#define CLR_SPI_MOSI() gpio_bits_reset(GPIOA,GPIO_PINS_7)//SDO=MOSI
#define READ_SPI_MISO() gpio_input_data_bit_read(GPIOA,GPIO_PINS_6) //SDI=MISO
void SpiIoInit(void)
{
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
gpio_init_type gpio_initstructure;
/* configure the lcd gpio */
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT;
gpio_initstructure.gpio_pins = GPIO_PINS_4|GPIO_PINS_5|GPIO_PINS_7;
gpio_initstructure.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOA, &gpio_initstructure);
gpio_bits_set(GPIOA,GPIO_PINS_4|GPIO_PINS_5|GPIO_PINS_7);
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_initstructure.gpio_mode = GPIO_MODE_INPUT;
gpio_initstructure.gpio_pins = GPIO_PINS_6;
gpio_initstructure.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOA, &gpio_initstructure);
gpio_bits_set(GPIOA,GPIO_PINS_6);
}
uint8_t SPIWriteByte(uint8_t dat)
{
uint16_t ret=0;
u8 i;
for(i=0;i<8;i++)
{
if(dat&0x80)
{
SET_SPI_MOSI();
}
else
{
CLR_SPI_MOSI();
}
dat<<=1;
// delay_us(1);
SET_SPI_SCLK();
ret<<=1;
if(READ_SPI_MISO())
{
ret+=1;
}
// delay_us(1);
CLR_SPI_SCLK();
}
return (ret&0x0ff);
}
(2) Hardware SPI
void SpiIoInit(void)
{
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT;
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_initstructure.gpio_pins = GPIO_PINS_4;
gpio_init(GPIOA, &gpio_initstructure);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE5, GPIO_MUX_0);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_0);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_0);
gpio_default_para_init(&gpio_initstructure);
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_initstructure.gpio_pull = GPIO_PULL_DOWN;
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_initstructure.gpio_pins = GPIO_PINS_5;
gpio_init(GPIOA, &gpio_initstructure);
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_initstructure.gpio_pins = GPIO_PINS_6;
gpio_init(GPIOA, &gpio_initstructure);
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_initstructure.gpio_pins = GPIO_PINS_7;
gpio_init(GPIOA, &gpio_initstructure);
spi_init_type spi_init_struct;
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
spi_default_para_init(&spi_init_struct);
spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_1EDGE;
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
spi_init(SPI1, &spi_init_struct);
spi_enable(SPI1, TRUE);
}
uint8_t SPIWriteByte(uint8_t dat)
{
uint16_t ret=0;
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET) {};
spi_i2s_data_transmit(SPI1, dat);
while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET) {};
ret=spi_i2s_data_receive(SPI1);
return (ret&0x0ff);
}
When using hardware SPI testing, the maximum rate of RC522 can only reach 12MHZ, which is divided by 8. Any higher rate will result in communication failure.
5. Rate measurement
Here we use an oscilloscope to capture the CLK waveform directly.
(1) Analog SPI
It can be seen that when using analog SPI, the frequency is 1.8MHz, and the same result is obtained by using a logic analyzer.
(2) Hardware SPI
It can be seen that when using hardware SPI, the frequency is 12MHz, which is consistent with the software setting. The result captured by the logic analyzer is also the same.
From the above comparative measurements, we can find that the hardware SPI rate is much greater than the software SPI. Therefore, in order to improve the CPU utilization, hardware SPI should be used as much as possible.
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