[Qinheng RISC-V core CH582] Basic information of the development board, chew slowly and swallow the official library[Copy link]
Development Board Basics - Chew Slowly
CH582 is a 32-bit microprocessor based on RISCV architecture. The integrated development environment uses the MounRiver integrated development environment based on Eclipse. The official provides standard library functions for CH582, which are located in "./EVT/EXAM/SRC".
Next we focus on the provided standard libraries and TRM.
Connecting command files and system storage resources
According to the official device manual, the development board should contain 4 Flash areas, but only two are enabled in the connection command file, namely RAM (32k) and FLASH (448k). These resources are sufficient for most application scenarios. The other two items not specified in the connection command file are:
24KB system boot program storage area BootLoader
8KB system non-volatile configuration information storage area InfoFlash
If you need to use it, you need to add the following code in the connection command file:
If you need to use it in C language code, you need to tell the linker which segment you need to save. You need to use the following declaration method:
__attribute__((section(".bootloader"))) // Used to modify the code and data that need to be saved in the BootLoader segment
__attribute__((section(".infoflash"))) // Used to modify the data that needs to be saved in the InfoFlash segment
These codes are reserved for future use and may be needed in the later implementation.
In addition, some constants are provided in the link command file, which may be used by the assembly code in the future. (You can see this after reading the next section. The _highcode_vma_start constant is exported directly here using the PROVIDE keyword).
In addition, we need to pay attention to the fact that the bootloader can be enabled through the "user-level non-volatile configuration information" configuration. After enabling, the bootloader segment code will be executed by default.
CFG_BOOT_EN = 1; // Enable BootLoader
The on-chip peripherals are also assigned corresponding addresses, but no corresponding storage space is allocated in the connection command file, which is different from the implementation method of TI's related DSP products that I usually use. You can find the implementation in the source code. Taking TMR0 as an example, we can find the following code:
#define R32_TMR0_CONTROL (*((volatile unsigned long)0x40002000)) // RW, TMR0 control
It can be seen that the source code also directly uses the volatile keyword to configure specific peripherals, but it is not stated in the connection command file, that is, the macro mode is directly used instead of the variable mode bound by the connection command file.
Comment: When I first learned about TI-DSP, I also used the volatile keyword to directly bind the address space to directly read and write the configuration registers of the peripherals. This method is quick to learn and easy to understand. However, the advantage of TI's choice of binding a peripheral variable to an address space is that DSP addresses a group of registers of a specific peripheral together, which can be easily accessed through the structure.
Initialization startup code
Next, you can find the initialization startup code "startup_CH583.S", and you can take a quick look at the layout. It's all familiar formulas, so let's briefly summarize the framework in pseudo code, and then analyze it in detail one by one.
_start: // .init
jmp _handle_reset
_vector_base: // .vector
// All interrupt types are specified here
//Declare functions modified with weak identifiers for all interrupt functions
handle_reset: // .handle_reset
// Build the stack frame
// Load the necessary code and data addresses into registers,
// Initialize the global variable segment
// Enable chip functions: pipeline control bit & dynamic prediction control bit; enable nested interrupt and hardware stack push function; configure vector table mode to absolute address mode
// Pass control of the program to the main function
t0, hand
csrw mepc, t0
Mr
The startup process is similar to other types of chips. If other friends need to study the content, they can carefully analyze the connection command file, which provides the loading address of various codes.
Comment: Simple, bright, clear and worth learning.
Assembly-C Interface
If you want to study the specific performance and implementation of the chip, you need to pay attention to the two files in the RVMSIS folder. Both files provide some packaged assembly statements, which are convenient for users to call directly to enable, disable, and detect specific functions.
A series of inline functions are provided in core_riscv.h, mainly for the related settings of PFIC (Programmable Fast Interrupt Controller). The content is quite detailed, so I won’t read it in depth. I will talk about it when I need it and continue directly.
Standard peripheral library
Next, we come to the most critical part, which is also the part that users should pay most attention to - the peripheral library. Next, we will gradually analyze the various peripherals that the chip has.
First is the summary of the total hardware resources on the chip: 2Mbps low-power Bluetooth BLE communication module, 2 full-speed USB host and device controllers and transceivers, 2 SPIs, 4 serial ports (UART), 1 I2C interface, 1 12-bit 14-channel (the number actually written in the code that can be connected to the outside world, excluding 2 internal channels) ADC, 14-channel touch button detection module, RTC, and power controller.
Next, the usage and characteristics of each peripheral are analyzed from the perspective of the peripheral library and the manual provided.
GPIO
The chip provides a total of 40 IO ports, including 16 GPIOA and 24 GPIOB. Among them, 16 channels of GPIOB have input interrupt function, and the other 8 do not have input interrupt function.
To access the input and output data of GPIO, you need to use the pin input register: R32_Px_PINand the pin output register R32_Px_OUT. When used as GPIO, you need to first use R32_Px_DIRthe register to write the direction of GPIO. The above registers represent the input status of each IO port through bits.
The PA[0]~PA[15] bits in the PA port are valid, corresponding to the 16 GPIO pins on the chip.
Bits PB[0] to PB[23] in the PB port are valid, corresponding to the 24 GPIO pins on the chip.
The GPIO drive capability can be GPIOx_ModeCfg()set through functions. The interrupt mode can be GPIOA_ITModeCfg()set through functions.
It provides the initialization and function multiplexing methods of each GPIO. Some I/O pins have multiplexing functions. After power-on, all I/O pins are general I/O functions by default. After enabling each functional module, the corresponding original GPIO pins are configured as the functional pins corresponding to each functional moduleGPIOPinRemap . Among them, GPIOA and GPIOB can be functionally mapped, and then some GPIOA multiplexing peripherals can be remapped to GPIOB through functions .
System clock
In full-speed mode, the clock should be input with a 32\,MHz crystal oscillator. From the PCB, we can see that the Ankang computer uses a 3225 active crystal oscillator. After PLL multiplication, we can get 32\,MHz\times 15=480\,MHz, and then after the default 5-frequency division, we can get the system frequency of 6.4\,MHz.
For the RTC clock, you can use the built-in 32\,kHz clock or an external crystal oscillator. The default internal crystal oscillator can be R8_CK32K_CONFIGconfigured using registers. Using an external 32.768\,kHz crystal oscillator will automatically reuse the PA10 and PA11 ports. No external crystal oscillator is used in this development board. The internal LSI clock can also be calibrated by the HSE.
The RTC clock is associated with the system's low-power mode wake-up and can be used to trigger wake-up at a scheduled time.
clk.cThe document provides information related to the chip clock configuration, including the bias current and load capacitance of the crystal, a method for calibrating the internal 32k clock Calibration_LSI, and RTC-related application functions.
General purpose timer
The system provides four 26-bit timers that can be used to measure the pulse length of the input signal (capture mode), or to generate PWM waveforms, or to perform basic timing and counting functions.
The library functions supporting the timer in the library file are very simple and easy to use. TIM1 and TIM2 support DMA to input pulse width for PWM, thus achieving modulation effects such as SPWM. TIM0 and TIM4 can be used for relatively simpler functions.
According to the GPIO chapter, if the timer's technical mode capture mode or PWM mode is enabled, multiplexing will be automatically performed:
TIM
Default GPIO
Remapping GPIO
HOUR0
PA9
PB23
TIM1
PA10
PB10
TIM2
PA11
PB11
TIM3
PB22
PA2
In addition to the 4-channel TIM that can be used as PWM, 8-channel dedicated PWM output can also be used. The library file also provides the corresponding reference clock and output mode settings, and R8_PWMx_DATAthe duty cycle can be directly set using registers.
Comments:
It mentions the interleaved output mode, but I don't really understand it. Maybe it has a special usage.
Regarding the synchronous triggering of the timer, it is actually mentioned in the TRM that the general timer can be triggered synchronously, but it is not clearly reflected in the document. Perhaps it means that the output is synchronized by enabling them simultaneously through one instruction after the two clocks are configured.
Such PWM output is sufficient for unipolar drive, but it may be a little weak for the H-bridge required for small DC motor drive. However, this chip is not inclined to this application direction, so there is no need to worry about this direction. If this problem does occur, bipolar drive can be achieved by adding an external driver chip and hardware dead zone. Overall, it does not affect the use.
General communication interface
The SPI, UART, and I2C interfaces provided by the chip are all very flexible (in terms of timing and usage). The library functions provide detailed instructions for use, which are very standard. SPI implements a pair of MISO/SIMO lines, which is sufficient for flexible application in most scenarios.
The USB controller and Bluetooth controller will be discussed in more detail in the following sections, so we will not go into details here.
Development board routine burning test
The development board will probably arrive tomorrow, but the newly bought WCH-link hasn't arrived yet, so JLINK can't be used. So take it slow for now, and see you next week. I'll burn some fun programs into it and write some simple program frameworks to test the waters.
I have read the author's article, which is easy to understand and has a deep technical background! It seems that you are a senior expert in the field of microcontrollers. I look forward to reading your work.
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