E-sports data: Design and practice of common analog systems for e-sports based on TI devices - high-speed DAC module design

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E-sports data: Design and practice of common analog systems for e-sports based on TI devices - high-speed DAC module design [Copy link]

High-speed DAC module design

The high-speed DAC module includes two circuits: D/A output and signal conditioning. Most of the controlled objects are voltage-controlled, while most high-speed D/A chips are current-type outputs, so they need to be conditioned before output. The D/A chip uses TI's 10-bit, single-channel, 165MSPS output update rate, high-speed digital-to-analog converter DAC900E chip with on-chip reference and high SFDR (100MSPS output of 5MHz signal can reach 68dB). The signal conditioning circuit uses TI's broadband, voltage-limiting operational amplifier OPA690.

DAC900E is powered by a single power supply, with an operating power supply range of 2.7V~5.5V; low glitch: 3pV-s; independent output current can reach 20mA (output impedance can reach 200kΩ). In view of its excellent dynamic performance, it is particularly suitable for high-speed data analog conversion systems. DAC900E has its own internal reference. To ensure the accuracy of the output voltage, its internal reference (the internal reference voltage is 1.24V) is used, but an external reference source can also be used. The internal structure block diagram of DAC900E is shown in Figure 1, the pins of the SO/TSSOP package are shown in Figure 2, and the pin functions are listed in Table 1. When the single-ended input signal is used, the corresponding relationship between the analog and digital outputs of DAC900E is listed in Table 2.

Figure 1 DAC900E internal structure diagram

Figure 2 DAC900E pin diagram

Table 1 DAC900E pin and function table

Table 2 Correspondence between analog and digital outputs of DAC900E

The high-speed DAC module circuit is shown in Figure 3. The voltage reference of DAC900E is optional. You can use its internal reference or an external reference source, which can be selected through J1 (the internal reference source is selected when connected to a low level, and the external reference source is used when connected to a high level). The external reference voltage is input through J2; the voltage reference port Vref (referred to as VR) is connected to a 10μF tantalum capacitor and a 0.1μF ceramic capacitor and bypassed to AGND to ensure a stable reference voltage.

The connection between the digital port of DAC900 and the controller (such as FPGA) is connected in series with a current limiting resistor to prevent the signal from ringing. A bypass capacitor is added near each chip power pin to filter out power supply noise and reduce the noise of the output waveform.

Figure 3 High-speed DAC module circuit

The analog output of DAC900E is a high-impedance differential current signal, that is, a complementary output current,

, which needs to be converted into a single-ended voltage output through an external current-voltage conversion circuit. The OPA690 high-speed operational amplifier chip is used in the figure. In order to facilitate the subsequent signal processing, the current is converted into a voltage signal through resistors R3 and R6. The amplifier circuit is composed of a differential circuit, which converts the differential signal output by the DAC into a single-ended output signal.

The value of the full-scale output IOUTFS is determined by the resistor R2 connected in series with the FSA pin, and the relationship is:

According to the data sheet, the maximum value of IOUTFS is 20mA and the minimum value is 2mA. Here, the maximum value of 20mA is selected. In order to obtain an output current of 20mA, R2 is

That is, when R2 is 2kΩ, a full-scale output of 20mA can be obtained.

Take R3=28.7Ω, R6=26.1Ω, then the OPA690 common-phase input voltage u+ is

The reverse input voltage u- is

The differential circuit does not amplify, but only converts the complementary current signals of the two outputs into voltage signals. Here, R5= R4=1kΩ, R8= R7=1kΩ. Then its amplification factor AV is

Then the final output voltage uO of the DAC module is

Among them, the variation range of IOUT is 0~IOUTFS. When IOUT=0 (that is, the DAC digital output is all 0), the output voltage uO+ is

When IOUT=IOUTFS (that is, the DAC digital output is all 1), the output voltage uO- is

Therefore, the peak-to-peak value of the output voltage VPP is

According to the DAC900E data sheet, the external reference voltage VR range is 0.1V to 1.25V. When VR=0.1V, the output voltage VPP_min is

When VR=1.25V, the output voltage VPP_max is

That is, the DAC900E output amplitude adjustment range is 87.68mV to 1096mV.