It took two years for a 19-year-old boy to build a 32-bit Risc-V processor using 230 pure 74 logic chips!
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If you want to DIY your own CPU, the first thing that comes to mind is to use FPGA to achieve it. For a friend in the electronics industry, making a simple CPU should not be too difficult. Of course, there are alternative methods. For example, someone used redstone to build a CPU in the game Minecraft, as shown below:
Now, a foreign guy has used a more primitive method to design and manufacture his own CPU, and it is a 32-bit RISC-V CPU! Please see the following report from the heart of the machine:
It took the 19-year-old geek two full years to design the CPU, make the prototype, the final product, and program the software.
RISC-V is an open source instruction set architecture (ISA) based on the principles of the Reduced Instruction Set Architecture (RISC). It is a kind of "open source hardware" corresponding to the open source software movement. The project started at the University of California, Berkeley in 2010, and the project contributors are volunteers and industry workers outside the university.
The RISC-V instruction set was designed with small, fast, and low-power realities in mind, but without over-engineering a specific microarchitecture. Compared to most instruction sets, the RISC-V instruction set can be used freely for any purpose, allowing anyone to design, manufacture, and sell RISC-V chips and software.
In early April 2021, Filip Szkandera, a 19-year-old geek who is keen on making his own CPU, designed and manufactured a 32-bit functional RISC-V CPU by himself, and built a personal computer "Pineapple ONE" that is different from other homemade computers. It took Filip two years to design, debug and install the CPU and all the hardware. Filip was also invited to give a presentation at the RISC-V Days Tokyo 2021 Spring held in Tokyo, and he became the youngest presenter at the conference since it was held in 2017.
Created by Filip Szkandera.
Overall, the "Pineapple No. 1" is composed of 8 square printed circuit boards stacked vertically, each with a side height of about 10 cm, plus a VGA display interface card . A total of more than 230 integrated circuits are used , most of which are 74HCT series logic chips. The schematic diagram is as follows:
The specifications of the 32-bit RISC-V CPU are as follows:
Currently, the commands supported by the "Pineapple No. 1" computer include: HELLO, HI, PEEK <ADDRESS>, POKE <ADDRESS> <DATA>, SYSTEM INFORMATION, CLEAR, etc.
In addition, although the CPU runs at only 500kHz, it is more than enough to play a snake game:
Filip introduced the technical details of his process from designing the CPU, making prototypes, input/output ports, final product to software programming in a blog (narrated in the first person below).
Design your own RISC-V CPU
Previously, I found a tutorial on Youtube about electronics enthusiast Ben Eater making his own CPU (building the famous 8-bit computer and the classic 6502 microprocessor), so I was fascinated and had the idea of making my own CPU. However, I felt that I didn't know enough about the basics of CPU, so I watched a tutorial video by Robert Baruch, a software engineer at Google Robotics, who built a 32-bit RISC-V CPU using only basic logic elements.
After that, I started making my own RISC-V CPU in a project called "Logisim-Evolution". The goal I set for myself was not to use any microcontrollers or FPGAs, only basic discrete logic components . The most basic RISC-V CPU supported by the compiler must include the extension "integer (I)" and be at least 32 bits. In addition, I also needed to install a VGA (video graphics array) output card.
I spent a full 6 months on the Logisim project and finally got a working program simulation. The next step was to draw the schematics of all the modules, buy all the PCBs (printed circuit boards) from the JLCPCB website and redesign them. Since this was my first time buying PCBs, I was worried about messing up everything, so I decided to handle it in and buy a few at a time to avoid being overwhelmed.
The simulation schematic in the Logisim-Evolution project is as follows:
After two rounds of design, there were only a few blocks left to deal with, one of which was the immediate generator. As I racked my brains to convert it from simulation to a proper schematic, I realized that I had made a fatal mistake: I had no idea how the simulation worked. Fortunately, the fix was not that difficult, so I made improvements to the PCB that had already been made.
Next, I tested the PCBs by connecting an open-source electronics prototyping platform, Arduino, to the inputs of each PCB, while monitoring the outputs and comparing them to the predictions. Once set up, everything ran automatically. Each test lasted at least a few hours.
When I was ready to put all the PCBs together, the modules were mounted on the wood at intervals and fixed with 3D printed spacers. Then I uploaded a test program and started testing.
The prototype diagram is as follows:
The Arduino platform was only used for debugging and was not used in the final product.
Even though I tested each PCB individually, not surprisingly, the first attempt failed, and I had to spend a lot of time trying to figure out why, and I found some errors, such as timing issues, which were hard to find.
The RISC-V CPU I built has two 8-bit input ports and two 8-bit output ports that you can access on the front panel via the RJ50 connector. In addition, there is a 7-segment display on the top module that is connected to a register that can be accessed by the program.
As for the connection to a VGA monitor, I built a VGA card inspired by Ben Eater. VGA output resolution is 200×150 pixels, black and white. Although I wanted to implement color display, it would require a large V-RAM, which is too expensive, so I gave up.
The lower board will display a static image stored in an EEPROM (Electrically Erasable Programmable Read Only Memory, Model 39SF010A). I used a dual-port SRAM (Static Random Access Memory) in the final product.
I also built some demo I/O modules that have RJ50 connectors on the end.
The PS/2 decoder was purchased ready-made; I didn't have the time to make one myself.
It wasn't easy to get the prototype running, but after about 5 months I finally succeeded.
I redesigned all the PCBs again, fixed the errors, and stacked them in a tower structure, so each module was connected only with pinheaders. It took about 3 months to redesign the PCBs and then put the final PCBs in order.
Additionally, I designed and used a Prusa i3 3D printer to print a cylindrical enclosure large enough to house all the PCBs and I/O connectors, which would also allow the keyboard and VGA monitor to be connected directly to the computer.
The final product, left: without cylindrical shell, right: with cylindrical shell installed.
Final product component disassembly:
Finally, after hundreds of hours of designing, soldering, and debugging, I finally saw the light of success. With the help of my good friend Jan Vykydal, I set up a RISC-V compatible compiler that worked well and wrote some system software and demo programs in C. This compiler can generate machine code, and I used a Python script to receive the code and flash it into the CPU memory.
I also created a library with some useful functions, the code is as follows:
Using this library, I created a simple shell program that can be interacted with through a PS/2 keyboard connected to one of the input ports. I used a PS/2 keyboard with a module to decode the input signal into 8 bits.
Editor: Du Wei, Source: Synced
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千斤顶
230 sounds more domineering
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