April 20 live broadcast review: New Infineon MOSFET based on source-down technology (including video, materials, Q&A)

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April 20 live broadcast review: New Infineon MOSFET based on source-down technology (including video, materials, Q&A) [Copy link]

Live broadcast time: April 20 (Tuesday) 10:00-11:30 am
Live broadcast topic: New Infineon MOSFET based on Source-down technology effectively improves power density, which is visible to the naked eye
Speech document: Click here to download
Watch replay : Click here to watch
Q&A summary:

Question content	Reply content
What is the drain to source creepage distance?	0.75mm
How much better is the new Infineon MOSFET based on Source-down technology than its competitors?	Compared with the 3*3 drain down of competitors, Rdson is reduced by more than 30%, and Qg can be saved by more than 20%. Compared with the 5*6 drain down of competitors, Rdson *Area can be saved by 60%. In applications such as SR/Oring/buck/motor drive, there is an opportunity to use 3*3 source down to replace the 5*6 drain down of competitors to improve efficiency and power density.
What is the maximum power supported?	The current of a single tube in mass production has reached more than 200A, such as BSZ009NE2LS5, but the actual application also depends on your heat dissipation design.
What are the advantages of Source-down MOSFET compared to traditional MOS?	Higher efficiency Higher efficiency, higher power density Lower BOM (bill of materials) cost
What are the characteristics of this MOS tube compared to ordinary ones?	Compared with 3*3 drain down, Rdson is 30% lower, thermal resistance Rthjc is reduced by more than 20%, and with system PCB design optimization, efficiency is improved and power density is higher.
What are the advantages of Infineon's MOSFET over ON Semiconductor's?	Compared with competitors with the same 3*3 architecture: Rdson is lower, Rthjc thermal resistance is smaller, Qg is smaller, and the center gate structure is more suitable for parallel drive. It has higher efficiency and improved power density.
Are there 80V source-down products? How many voltage levels are there?	This year, we will release source down 3*3 packages with voltage levels of 40V, 60V, 80V, 100V, 120V, 150V, etc.
Are source-down products currently in mass production?	The 25V/40V withstand voltage level has been mass-produced, and other withstand voltage levels will be mass-produced this year.
What is the withstand voltage of a low voltage power MOSFET?	7 groups of voltage levels, 25V/30V/40V/60V/80V/100V/150V to meet various applications
My design usually requires multiple NOSFETs to be connected in parallel. How can source-down products help in paralleling multiple transistors?	The source down 3*3 center gate is designed for parallel applications.
How much has the power density been improved?	Source down 3*3package, can replace 5*6 drain down MOS similar to Rdson
How large is the saturation drain-source current of a source-down MOSFET?	Take IQE006N02LM5 (Max. Rdson is 0.65mohm) as an example, at room temperature Id=298A, the Peak current can withstand 1192A.
Does the drive circuit require any special processing?	No different from ordinary MOS, even easier to drive
Does the drive circuit require any special processing?	It is the same as the usual drain down drive circuit.
What are the specifications of MOSFETs of this technology?	25V~150V withstand voltage level
What is the gate material of MOSFET based on Source-down technology made of?	The more common drain down is the same
How is the Source-Down MOSFET immune to interference?	Same as normal drain down
What are the advantages of the new power OptiMOS MOSFET based on Source-down technology compared with its peers?	30% lower Rdson, 20% lower thermal resistance, smaller Qg. . . . .
What are the power supply and withstand voltage of low voltage power MOSFET?	Infineon will launch a series of products with a withstand voltage of 25V~150V, including logic level and normal level products. The supply voltage is the same as the usual drain down.
How much current can this MOS tube pass?	Taking IQE006N02LM5 (Max. Rdson is 0.65m ohm), the theoretical current at room temperature is Id=298A, Peak current is 1192A
Is it suitable for wireless charging?	Suitable
What is the on-resistance of a low voltage power MOSFET?	Max. Rdson of 25V IQE006N02LM5 = 0.65m ohm.
What is the thermal stability of MOSFET based on Source-down technology?	Compared with the drain down field frequency of the same package, Rthjc can be optimized by 20%. At the same time, with the system's PCB design, it is easier to dissipate heat and has better thermal performance.
What is the application range of Source-Down MOSFET?	SR rectifier, Oring, Buck, electric drill and other applications requiring high power density and high current
How to quantify the effective improvement of power density? How much is the improvement? What are the main measures to achieve it? Thank you	Taking synchronous rectification as an example, it can replace 5*6 drain down products. Id*Area can be optimized by 60%
Source-Down technology PCB heat dissipation, are there any requirements for PCB material and design? ?	The requirements for PCB materials are the same as those for normal MOS. With the source down package, the PCB can have more through holes to facilitate heat dissipation.
Has R DS decreased? If so, by how much?	Compared with the drain down of the same size, it optimizes Rdson by 30%
What is the operating temperature of a low voltage power MOSFET?	-55°~150°
Is this only a low-pressure product? Is there one suitable for high-pressure?	This year, we will launch 25V/40V/60V/80V/100V/120V/150V and other voltage ratings
What is the development prospect of source-down technology?	Widely welcomed by customers in SR synchronous rectification, Oring, buck circuit, electric drill, etc.
How can I design the heat dissipation of this type of MOS package better?	By using the source down package, the PCB board can have more through holes at the source down position to facilitate heat dissipation.
Does this require an external heat sink?	Better Rdson means higher efficiency, and the same application requires a smaller heat dissipation area or even no heat dissipation area.
Can PIN to PIN be compatible with Drain-Down?	Most applications cannot be used. It depends on the specific model.
What is the Rds value of Infineon's OptiMOS MOSFET?	The lowest Rdson currently in mass production has reached 0.65mohm
What is source-down technology?	Intuitively speaking, the previous MOS heat dissipation pad was a D pole, while the new Source down technology makes the heat dissipation pad an S pole, thus bringing many advantages mentioned in the video.
The balance between power density and heat dissipation?	New technology reduces Rdson and thermal resistance, which will only increase power density further
Will source-down technology affect the power loss of the chip?	Yes, smaller Rdson will result in smaller losses
What is the maximum withstand voltage design? What method and principle is used for cooling performance? Thank you	The maximum voltage of mass production is 150V, and the cooling method is no different from traditional MOS.
When using this new MOSFET for parallel design, is it necessary to design the parameters for current equalization of the parallel tubes?	The trend of temperature characteristics of source-down products is consistent with that of traditional MOS. Because of the positive temperature coefficient, special current sharing design is not required for common parallel designs.
Are there any advantages in using it for high current and high frequency synchronous rectification?	Because of the new technology, Rdson is smaller and easier to drive, so it is very suitable for high-frequency synchronous rectification.
I mainly use it as a constant current driver for LEDs?	Low voltage linear dimming can be done, with better performance