ADC12 usage in MSP430F5XXX

火辣西米秀

ADC12 usage in MSP430F5XXX [Copy link]

, The AD part of the usage process
mainly configures the clock, reference source, sampling channel, sampling mode, storage and sample hold of the ADC12 module.
Let's go through it one by one.

The first is the clock of the ADC12 module. This is the clock when the module is running. It is different from the sampling timer. I was confused for a while. This is configured by ADC12SSEL and ADC12DIV in ADC12CTL1. You can choose ADC12OSC/ACLK/SMCLK/MCLK. The TI routines seem to choose ADC12OSC, which is 5MHZ, but the frequency is easily affected by the outside world. After this part is configured, ADC12CLK is obtained. The
second reference source, I did not study this part in detail, because I don't use this in my design, so I will skip it.
The third sampling channel, the registers related to this are ADC12MCTL and ADC12CSTARTADD of ADC12CTL1.

In the first type of single-channel sampling, ADC12MCTL selects the input channel for sampling, and the value of ADC12CSTARTADD selects the storage register in which the sampled value of this channel is stored. For example:

ADC12CTL1 |= ADC12CSTARTADD3+ADC12CSTARTADD2+ADC12CSTARTADD1;
ADC12MCTL14 = ADC12INCH_14;

The above two sentences are to sample channel 14, and the sampled value of channel 14 is stored in ADC12MEM14. If you do not set the value of ADC12CSTARTADD, the sampled value is stored in ADC12MEM0 by default.

In the second type of sequential channel sampling, ADC12MCTL selects the input channel for sampling, and the value of ADC12CSTARTADD selects the first storage register where the value of this sequential sampling is stored. For example:

ADC12MCTL0 = ADC12INCH_0;
ADC12MCTL1 = ADC12INCH_1;
ADC12MCTL2 = ADC12INCH_2;
ADC12MCTL3 = ADC12INCH_3;
ADC12MCTL4 = ADC12INCH_4; ADC12MCTL5 = ADC12INCH_5; ADC12MCTL6 = ADC12INCH_6
; ADC12MCTL7 = ADC12INCH_7+ADC12EOS; I did not configure the value of ADC12CSTARTADD, so after sampling starts, the value of channel 0 is stored in ADC12MEM0, the value of channel 1 is stored in ADC12MEM1, and so on.

The fourth sampling mode can be programmed according to the mode diagram in the user guide, and configured using ADC12CONSEQ in ADC12CTL1.

There is nothing much to say about the fifth storage. It can be mentioned in the third sampling channel. I will mainly talk about the last sample and hold. This part is a new knowledge point I have learned.
The sample and hold is caused by the sampling timer trigger signal SHI signal. This part has confused me for a long time. The SHI signal is configured by ADC12SHS of ADC12CTL1, and there are 4 options: ADC12OSC/TIMERA.OUT1/TIMERB.OUT0/TIMERB.OUT1.

There are two sampling and holding modes, which are controlled by the ADC12SHP bit of ADC12CTL1. When ADC12SHP=0, it is the extended mode, and when ADC12SHP=1, it is the pulse mode.

In the first extended mode, the SHI signal starts sampling at the rising edge. The high level time after the rising edge is the sampling time. The SHI signal falls on the edge to convert the sampling result. The conversion requires 13 ADC12CLKs. In the
second pulse mode, the SHI signal triggers the sampling timer. The sampling timer controls when you start sampling and when you start converting. The sampling timer is configured by ADC12SHT0 and ADC12SHT1 of ADC12CTL0. Sampling is performed within the sampling timer time, and the sampling result is converted immediately after sampling. If your ADC12MSC=1 at this time, if the single-channel sampling will continue to perform single-channel sampling conversion, if it is a serial channel, it will continue to sample and convert until ADC12EOS=1. If ADC12MSC=0, the sampling ends, and the next sampling time is when the next SHI signal rises.