Sharing a carefully adjusted hysteresis comparator

sfcsdc

Sharing a carefully adjusted hysteresis comparator [Copy link]

Some time ago, I was studying hysteresis comparators.

Then I want to make a comparator:

When the input voltage is <12V, the output is high;

When the input voltage is >2V, the output is low;

After thinking about it, I found that the usual hysteresis comparator cannot achieve this function.

Because the hysteresis comparator realizes the hysteresis comparison function by changing the compared voltage.

After the comparison voltage changes, the relative size of the two input terminals cannot be changed, so that stability can be achieved.

in other words

When the input voltage is less than 12V, my output will change, and the comparison voltage will also change. But if it changes to 2V, the input signal is greater than the comparison voltage, so the output will oscillate.

Therefore, usually for a hysteresis comparator, when the input voltage is less than 12V, the comparison voltage must become larger than 12V, and the change trend of the comparison voltage must be opposite to the change trend of the input voltage.

Therefore, if I want to achieve the previous comparison requirement, I can only make the change of the comparison voltage lag, so that the output voltage will not oscillate.

The implementation idea is shown in the following figure:

Do any teachers have any better ideas?

sfcsdc

Of course, this circuit requires careful adjustment of the hysteresis time of the comparison voltage change:

It must be greater than the time it takes for the input voltage to change to this point, and less than the time it takes for the input voltage to exceed this point.

Otherwise oscillation will occur.

This is a relatively big problem.

maychang

sfcsdc posted on 2020-8-20 18:59 Of course, this circuit requires careful adjustment of the hysteresis time of the comparison voltage change: it must be greater than the time it takes for the input voltage to change to this point, and less than the input...

For your hysteresis comparator, the input signal must change monotonically, and the speed of change must not be too slow. If the input signal changes first and then rises before reaching the comparison point, the time delay will fail. If the input signal changes very slowly, it will also fail.

gmchen

The original poster's question was not clearly stated.

According to the given diagram, the author's idea is: when the voltage drops from above 12V to below 12V, the output is low, and when the voltage rises from below 2V to above 2V, the output is high. That is, the rising edge or falling edge of the input is compared separately, and the two comparison voltages are inconsistent. This requirement actually requires the input state to be memorized, so it is difficult to achieve with just one comparator. It is recommended to make a window (2V to 12V) comparator, and then use a logic circuit to achieve the required output.

sfcsdc

maychang posted on 2020-8-20 19:37 For your hysteresis comparator, the input signal must ensure monotonic changes, and the speed of change must not be too slow. If the input signal changes first and then decreases, it will not...

Yes, this circuit is only used in special circumstances.

And the corresponding parameters should be set according to the rising and falling speeds of the input signal.